Source file src/cmd/compile/internal/ssa/rewriteMIPS.go

     1  // Code generated from gen/MIPS.rules; DO NOT EDIT.
     2  // generated with: cd gen; go run *.go
     3  
     4  package ssa
     5  
     6  import "cmd/compile/internal/types"
     7  
     8  func rewriteValueMIPS(v *Value) bool {
     9  	switch v.Op {
    10  	case OpAdd16:
    11  		v.Op = OpMIPSADD
    12  		return true
    13  	case OpAdd32:
    14  		v.Op = OpMIPSADD
    15  		return true
    16  	case OpAdd32F:
    17  		v.Op = OpMIPSADDF
    18  		return true
    19  	case OpAdd32withcarry:
    20  		return rewriteValueMIPS_OpAdd32withcarry(v)
    21  	case OpAdd64F:
    22  		v.Op = OpMIPSADDD
    23  		return true
    24  	case OpAdd8:
    25  		v.Op = OpMIPSADD
    26  		return true
    27  	case OpAddPtr:
    28  		v.Op = OpMIPSADD
    29  		return true
    30  	case OpAddr:
    31  		return rewriteValueMIPS_OpAddr(v)
    32  	case OpAnd16:
    33  		v.Op = OpMIPSAND
    34  		return true
    35  	case OpAnd32:
    36  		v.Op = OpMIPSAND
    37  		return true
    38  	case OpAnd8:
    39  		v.Op = OpMIPSAND
    40  		return true
    41  	case OpAndB:
    42  		v.Op = OpMIPSAND
    43  		return true
    44  	case OpAtomicAdd32:
    45  		v.Op = OpMIPSLoweredAtomicAdd
    46  		return true
    47  	case OpAtomicAnd32:
    48  		v.Op = OpMIPSLoweredAtomicAnd
    49  		return true
    50  	case OpAtomicAnd8:
    51  		return rewriteValueMIPS_OpAtomicAnd8(v)
    52  	case OpAtomicCompareAndSwap32:
    53  		v.Op = OpMIPSLoweredAtomicCas
    54  		return true
    55  	case OpAtomicExchange32:
    56  		v.Op = OpMIPSLoweredAtomicExchange
    57  		return true
    58  	case OpAtomicLoad32:
    59  		v.Op = OpMIPSLoweredAtomicLoad32
    60  		return true
    61  	case OpAtomicLoad8:
    62  		v.Op = OpMIPSLoweredAtomicLoad8
    63  		return true
    64  	case OpAtomicLoadPtr:
    65  		v.Op = OpMIPSLoweredAtomicLoad32
    66  		return true
    67  	case OpAtomicOr32:
    68  		v.Op = OpMIPSLoweredAtomicOr
    69  		return true
    70  	case OpAtomicOr8:
    71  		return rewriteValueMIPS_OpAtomicOr8(v)
    72  	case OpAtomicStore32:
    73  		v.Op = OpMIPSLoweredAtomicStore32
    74  		return true
    75  	case OpAtomicStore8:
    76  		v.Op = OpMIPSLoweredAtomicStore8
    77  		return true
    78  	case OpAtomicStorePtrNoWB:
    79  		v.Op = OpMIPSLoweredAtomicStore32
    80  		return true
    81  	case OpAvg32u:
    82  		return rewriteValueMIPS_OpAvg32u(v)
    83  	case OpBitLen32:
    84  		return rewriteValueMIPS_OpBitLen32(v)
    85  	case OpClosureCall:
    86  		v.Op = OpMIPSCALLclosure
    87  		return true
    88  	case OpCom16:
    89  		return rewriteValueMIPS_OpCom16(v)
    90  	case OpCom32:
    91  		return rewriteValueMIPS_OpCom32(v)
    92  	case OpCom8:
    93  		return rewriteValueMIPS_OpCom8(v)
    94  	case OpConst16:
    95  		return rewriteValueMIPS_OpConst16(v)
    96  	case OpConst32:
    97  		return rewriteValueMIPS_OpConst32(v)
    98  	case OpConst32F:
    99  		v.Op = OpMIPSMOVFconst
   100  		return true
   101  	case OpConst64F:
   102  		v.Op = OpMIPSMOVDconst
   103  		return true
   104  	case OpConst8:
   105  		return rewriteValueMIPS_OpConst8(v)
   106  	case OpConstBool:
   107  		return rewriteValueMIPS_OpConstBool(v)
   108  	case OpConstNil:
   109  		return rewriteValueMIPS_OpConstNil(v)
   110  	case OpCtz32:
   111  		return rewriteValueMIPS_OpCtz32(v)
   112  	case OpCtz32NonZero:
   113  		v.Op = OpCtz32
   114  		return true
   115  	case OpCvt32Fto32:
   116  		v.Op = OpMIPSTRUNCFW
   117  		return true
   118  	case OpCvt32Fto64F:
   119  		v.Op = OpMIPSMOVFD
   120  		return true
   121  	case OpCvt32to32F:
   122  		v.Op = OpMIPSMOVWF
   123  		return true
   124  	case OpCvt32to64F:
   125  		v.Op = OpMIPSMOVWD
   126  		return true
   127  	case OpCvt64Fto32:
   128  		v.Op = OpMIPSTRUNCDW
   129  		return true
   130  	case OpCvt64Fto32F:
   131  		v.Op = OpMIPSMOVDF
   132  		return true
   133  	case OpCvtBoolToUint8:
   134  		v.Op = OpCopy
   135  		return true
   136  	case OpDiv16:
   137  		return rewriteValueMIPS_OpDiv16(v)
   138  	case OpDiv16u:
   139  		return rewriteValueMIPS_OpDiv16u(v)
   140  	case OpDiv32:
   141  		return rewriteValueMIPS_OpDiv32(v)
   142  	case OpDiv32F:
   143  		v.Op = OpMIPSDIVF
   144  		return true
   145  	case OpDiv32u:
   146  		return rewriteValueMIPS_OpDiv32u(v)
   147  	case OpDiv64F:
   148  		v.Op = OpMIPSDIVD
   149  		return true
   150  	case OpDiv8:
   151  		return rewriteValueMIPS_OpDiv8(v)
   152  	case OpDiv8u:
   153  		return rewriteValueMIPS_OpDiv8u(v)
   154  	case OpEq16:
   155  		return rewriteValueMIPS_OpEq16(v)
   156  	case OpEq32:
   157  		return rewriteValueMIPS_OpEq32(v)
   158  	case OpEq32F:
   159  		return rewriteValueMIPS_OpEq32F(v)
   160  	case OpEq64F:
   161  		return rewriteValueMIPS_OpEq64F(v)
   162  	case OpEq8:
   163  		return rewriteValueMIPS_OpEq8(v)
   164  	case OpEqB:
   165  		return rewriteValueMIPS_OpEqB(v)
   166  	case OpEqPtr:
   167  		return rewriteValueMIPS_OpEqPtr(v)
   168  	case OpGetCallerPC:
   169  		v.Op = OpMIPSLoweredGetCallerPC
   170  		return true
   171  	case OpGetCallerSP:
   172  		v.Op = OpMIPSLoweredGetCallerSP
   173  		return true
   174  	case OpGetClosurePtr:
   175  		v.Op = OpMIPSLoweredGetClosurePtr
   176  		return true
   177  	case OpHmul32:
   178  		return rewriteValueMIPS_OpHmul32(v)
   179  	case OpHmul32u:
   180  		return rewriteValueMIPS_OpHmul32u(v)
   181  	case OpInterCall:
   182  		v.Op = OpMIPSCALLinter
   183  		return true
   184  	case OpIsInBounds:
   185  		return rewriteValueMIPS_OpIsInBounds(v)
   186  	case OpIsNonNil:
   187  		return rewriteValueMIPS_OpIsNonNil(v)
   188  	case OpIsSliceInBounds:
   189  		return rewriteValueMIPS_OpIsSliceInBounds(v)
   190  	case OpLeq16:
   191  		return rewriteValueMIPS_OpLeq16(v)
   192  	case OpLeq16U:
   193  		return rewriteValueMIPS_OpLeq16U(v)
   194  	case OpLeq32:
   195  		return rewriteValueMIPS_OpLeq32(v)
   196  	case OpLeq32F:
   197  		return rewriteValueMIPS_OpLeq32F(v)
   198  	case OpLeq32U:
   199  		return rewriteValueMIPS_OpLeq32U(v)
   200  	case OpLeq64F:
   201  		return rewriteValueMIPS_OpLeq64F(v)
   202  	case OpLeq8:
   203  		return rewriteValueMIPS_OpLeq8(v)
   204  	case OpLeq8U:
   205  		return rewriteValueMIPS_OpLeq8U(v)
   206  	case OpLess16:
   207  		return rewriteValueMIPS_OpLess16(v)
   208  	case OpLess16U:
   209  		return rewriteValueMIPS_OpLess16U(v)
   210  	case OpLess32:
   211  		return rewriteValueMIPS_OpLess32(v)
   212  	case OpLess32F:
   213  		return rewriteValueMIPS_OpLess32F(v)
   214  	case OpLess32U:
   215  		return rewriteValueMIPS_OpLess32U(v)
   216  	case OpLess64F:
   217  		return rewriteValueMIPS_OpLess64F(v)
   218  	case OpLess8:
   219  		return rewriteValueMIPS_OpLess8(v)
   220  	case OpLess8U:
   221  		return rewriteValueMIPS_OpLess8U(v)
   222  	case OpLoad:
   223  		return rewriteValueMIPS_OpLoad(v)
   224  	case OpLocalAddr:
   225  		return rewriteValueMIPS_OpLocalAddr(v)
   226  	case OpLsh16x16:
   227  		return rewriteValueMIPS_OpLsh16x16(v)
   228  	case OpLsh16x32:
   229  		return rewriteValueMIPS_OpLsh16x32(v)
   230  	case OpLsh16x64:
   231  		return rewriteValueMIPS_OpLsh16x64(v)
   232  	case OpLsh16x8:
   233  		return rewriteValueMIPS_OpLsh16x8(v)
   234  	case OpLsh32x16:
   235  		return rewriteValueMIPS_OpLsh32x16(v)
   236  	case OpLsh32x32:
   237  		return rewriteValueMIPS_OpLsh32x32(v)
   238  	case OpLsh32x64:
   239  		return rewriteValueMIPS_OpLsh32x64(v)
   240  	case OpLsh32x8:
   241  		return rewriteValueMIPS_OpLsh32x8(v)
   242  	case OpLsh8x16:
   243  		return rewriteValueMIPS_OpLsh8x16(v)
   244  	case OpLsh8x32:
   245  		return rewriteValueMIPS_OpLsh8x32(v)
   246  	case OpLsh8x64:
   247  		return rewriteValueMIPS_OpLsh8x64(v)
   248  	case OpLsh8x8:
   249  		return rewriteValueMIPS_OpLsh8x8(v)
   250  	case OpMIPSADD:
   251  		return rewriteValueMIPS_OpMIPSADD(v)
   252  	case OpMIPSADDconst:
   253  		return rewriteValueMIPS_OpMIPSADDconst(v)
   254  	case OpMIPSAND:
   255  		return rewriteValueMIPS_OpMIPSAND(v)
   256  	case OpMIPSANDconst:
   257  		return rewriteValueMIPS_OpMIPSANDconst(v)
   258  	case OpMIPSCMOVZ:
   259  		return rewriteValueMIPS_OpMIPSCMOVZ(v)
   260  	case OpMIPSCMOVZzero:
   261  		return rewriteValueMIPS_OpMIPSCMOVZzero(v)
   262  	case OpMIPSLoweredAtomicAdd:
   263  		return rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v)
   264  	case OpMIPSLoweredAtomicStore32:
   265  		return rewriteValueMIPS_OpMIPSLoweredAtomicStore32(v)
   266  	case OpMIPSMOVBUload:
   267  		return rewriteValueMIPS_OpMIPSMOVBUload(v)
   268  	case OpMIPSMOVBUreg:
   269  		return rewriteValueMIPS_OpMIPSMOVBUreg(v)
   270  	case OpMIPSMOVBload:
   271  		return rewriteValueMIPS_OpMIPSMOVBload(v)
   272  	case OpMIPSMOVBreg:
   273  		return rewriteValueMIPS_OpMIPSMOVBreg(v)
   274  	case OpMIPSMOVBstore:
   275  		return rewriteValueMIPS_OpMIPSMOVBstore(v)
   276  	case OpMIPSMOVBstorezero:
   277  		return rewriteValueMIPS_OpMIPSMOVBstorezero(v)
   278  	case OpMIPSMOVDload:
   279  		return rewriteValueMIPS_OpMIPSMOVDload(v)
   280  	case OpMIPSMOVDstore:
   281  		return rewriteValueMIPS_OpMIPSMOVDstore(v)
   282  	case OpMIPSMOVFload:
   283  		return rewriteValueMIPS_OpMIPSMOVFload(v)
   284  	case OpMIPSMOVFstore:
   285  		return rewriteValueMIPS_OpMIPSMOVFstore(v)
   286  	case OpMIPSMOVHUload:
   287  		return rewriteValueMIPS_OpMIPSMOVHUload(v)
   288  	case OpMIPSMOVHUreg:
   289  		return rewriteValueMIPS_OpMIPSMOVHUreg(v)
   290  	case OpMIPSMOVHload:
   291  		return rewriteValueMIPS_OpMIPSMOVHload(v)
   292  	case OpMIPSMOVHreg:
   293  		return rewriteValueMIPS_OpMIPSMOVHreg(v)
   294  	case OpMIPSMOVHstore:
   295  		return rewriteValueMIPS_OpMIPSMOVHstore(v)
   296  	case OpMIPSMOVHstorezero:
   297  		return rewriteValueMIPS_OpMIPSMOVHstorezero(v)
   298  	case OpMIPSMOVWload:
   299  		return rewriteValueMIPS_OpMIPSMOVWload(v)
   300  	case OpMIPSMOVWnop:
   301  		return rewriteValueMIPS_OpMIPSMOVWnop(v)
   302  	case OpMIPSMOVWreg:
   303  		return rewriteValueMIPS_OpMIPSMOVWreg(v)
   304  	case OpMIPSMOVWstore:
   305  		return rewriteValueMIPS_OpMIPSMOVWstore(v)
   306  	case OpMIPSMOVWstorezero:
   307  		return rewriteValueMIPS_OpMIPSMOVWstorezero(v)
   308  	case OpMIPSMUL:
   309  		return rewriteValueMIPS_OpMIPSMUL(v)
   310  	case OpMIPSNEG:
   311  		return rewriteValueMIPS_OpMIPSNEG(v)
   312  	case OpMIPSNOR:
   313  		return rewriteValueMIPS_OpMIPSNOR(v)
   314  	case OpMIPSNORconst:
   315  		return rewriteValueMIPS_OpMIPSNORconst(v)
   316  	case OpMIPSOR:
   317  		return rewriteValueMIPS_OpMIPSOR(v)
   318  	case OpMIPSORconst:
   319  		return rewriteValueMIPS_OpMIPSORconst(v)
   320  	case OpMIPSSGT:
   321  		return rewriteValueMIPS_OpMIPSSGT(v)
   322  	case OpMIPSSGTU:
   323  		return rewriteValueMIPS_OpMIPSSGTU(v)
   324  	case OpMIPSSGTUconst:
   325  		return rewriteValueMIPS_OpMIPSSGTUconst(v)
   326  	case OpMIPSSGTUzero:
   327  		return rewriteValueMIPS_OpMIPSSGTUzero(v)
   328  	case OpMIPSSGTconst:
   329  		return rewriteValueMIPS_OpMIPSSGTconst(v)
   330  	case OpMIPSSGTzero:
   331  		return rewriteValueMIPS_OpMIPSSGTzero(v)
   332  	case OpMIPSSLL:
   333  		return rewriteValueMIPS_OpMIPSSLL(v)
   334  	case OpMIPSSLLconst:
   335  		return rewriteValueMIPS_OpMIPSSLLconst(v)
   336  	case OpMIPSSRA:
   337  		return rewriteValueMIPS_OpMIPSSRA(v)
   338  	case OpMIPSSRAconst:
   339  		return rewriteValueMIPS_OpMIPSSRAconst(v)
   340  	case OpMIPSSRL:
   341  		return rewriteValueMIPS_OpMIPSSRL(v)
   342  	case OpMIPSSRLconst:
   343  		return rewriteValueMIPS_OpMIPSSRLconst(v)
   344  	case OpMIPSSUB:
   345  		return rewriteValueMIPS_OpMIPSSUB(v)
   346  	case OpMIPSSUBconst:
   347  		return rewriteValueMIPS_OpMIPSSUBconst(v)
   348  	case OpMIPSXOR:
   349  		return rewriteValueMIPS_OpMIPSXOR(v)
   350  	case OpMIPSXORconst:
   351  		return rewriteValueMIPS_OpMIPSXORconst(v)
   352  	case OpMod16:
   353  		return rewriteValueMIPS_OpMod16(v)
   354  	case OpMod16u:
   355  		return rewriteValueMIPS_OpMod16u(v)
   356  	case OpMod32:
   357  		return rewriteValueMIPS_OpMod32(v)
   358  	case OpMod32u:
   359  		return rewriteValueMIPS_OpMod32u(v)
   360  	case OpMod8:
   361  		return rewriteValueMIPS_OpMod8(v)
   362  	case OpMod8u:
   363  		return rewriteValueMIPS_OpMod8u(v)
   364  	case OpMove:
   365  		return rewriteValueMIPS_OpMove(v)
   366  	case OpMul16:
   367  		v.Op = OpMIPSMUL
   368  		return true
   369  	case OpMul32:
   370  		v.Op = OpMIPSMUL
   371  		return true
   372  	case OpMul32F:
   373  		v.Op = OpMIPSMULF
   374  		return true
   375  	case OpMul32uhilo:
   376  		v.Op = OpMIPSMULTU
   377  		return true
   378  	case OpMul64F:
   379  		v.Op = OpMIPSMULD
   380  		return true
   381  	case OpMul8:
   382  		v.Op = OpMIPSMUL
   383  		return true
   384  	case OpNeg16:
   385  		v.Op = OpMIPSNEG
   386  		return true
   387  	case OpNeg32:
   388  		v.Op = OpMIPSNEG
   389  		return true
   390  	case OpNeg32F:
   391  		v.Op = OpMIPSNEGF
   392  		return true
   393  	case OpNeg64F:
   394  		v.Op = OpMIPSNEGD
   395  		return true
   396  	case OpNeg8:
   397  		v.Op = OpMIPSNEG
   398  		return true
   399  	case OpNeq16:
   400  		return rewriteValueMIPS_OpNeq16(v)
   401  	case OpNeq32:
   402  		return rewriteValueMIPS_OpNeq32(v)
   403  	case OpNeq32F:
   404  		return rewriteValueMIPS_OpNeq32F(v)
   405  	case OpNeq64F:
   406  		return rewriteValueMIPS_OpNeq64F(v)
   407  	case OpNeq8:
   408  		return rewriteValueMIPS_OpNeq8(v)
   409  	case OpNeqB:
   410  		v.Op = OpMIPSXOR
   411  		return true
   412  	case OpNeqPtr:
   413  		return rewriteValueMIPS_OpNeqPtr(v)
   414  	case OpNilCheck:
   415  		v.Op = OpMIPSLoweredNilCheck
   416  		return true
   417  	case OpNot:
   418  		return rewriteValueMIPS_OpNot(v)
   419  	case OpOffPtr:
   420  		return rewriteValueMIPS_OpOffPtr(v)
   421  	case OpOr16:
   422  		v.Op = OpMIPSOR
   423  		return true
   424  	case OpOr32:
   425  		v.Op = OpMIPSOR
   426  		return true
   427  	case OpOr8:
   428  		v.Op = OpMIPSOR
   429  		return true
   430  	case OpOrB:
   431  		v.Op = OpMIPSOR
   432  		return true
   433  	case OpPanicBounds:
   434  		return rewriteValueMIPS_OpPanicBounds(v)
   435  	case OpPanicExtend:
   436  		return rewriteValueMIPS_OpPanicExtend(v)
   437  	case OpRotateLeft16:
   438  		return rewriteValueMIPS_OpRotateLeft16(v)
   439  	case OpRotateLeft32:
   440  		return rewriteValueMIPS_OpRotateLeft32(v)
   441  	case OpRotateLeft64:
   442  		return rewriteValueMIPS_OpRotateLeft64(v)
   443  	case OpRotateLeft8:
   444  		return rewriteValueMIPS_OpRotateLeft8(v)
   445  	case OpRound32F:
   446  		v.Op = OpCopy
   447  		return true
   448  	case OpRound64F:
   449  		v.Op = OpCopy
   450  		return true
   451  	case OpRsh16Ux16:
   452  		return rewriteValueMIPS_OpRsh16Ux16(v)
   453  	case OpRsh16Ux32:
   454  		return rewriteValueMIPS_OpRsh16Ux32(v)
   455  	case OpRsh16Ux64:
   456  		return rewriteValueMIPS_OpRsh16Ux64(v)
   457  	case OpRsh16Ux8:
   458  		return rewriteValueMIPS_OpRsh16Ux8(v)
   459  	case OpRsh16x16:
   460  		return rewriteValueMIPS_OpRsh16x16(v)
   461  	case OpRsh16x32:
   462  		return rewriteValueMIPS_OpRsh16x32(v)
   463  	case OpRsh16x64:
   464  		return rewriteValueMIPS_OpRsh16x64(v)
   465  	case OpRsh16x8:
   466  		return rewriteValueMIPS_OpRsh16x8(v)
   467  	case OpRsh32Ux16:
   468  		return rewriteValueMIPS_OpRsh32Ux16(v)
   469  	case OpRsh32Ux32:
   470  		return rewriteValueMIPS_OpRsh32Ux32(v)
   471  	case OpRsh32Ux64:
   472  		return rewriteValueMIPS_OpRsh32Ux64(v)
   473  	case OpRsh32Ux8:
   474  		return rewriteValueMIPS_OpRsh32Ux8(v)
   475  	case OpRsh32x16:
   476  		return rewriteValueMIPS_OpRsh32x16(v)
   477  	case OpRsh32x32:
   478  		return rewriteValueMIPS_OpRsh32x32(v)
   479  	case OpRsh32x64:
   480  		return rewriteValueMIPS_OpRsh32x64(v)
   481  	case OpRsh32x8:
   482  		return rewriteValueMIPS_OpRsh32x8(v)
   483  	case OpRsh8Ux16:
   484  		return rewriteValueMIPS_OpRsh8Ux16(v)
   485  	case OpRsh8Ux32:
   486  		return rewriteValueMIPS_OpRsh8Ux32(v)
   487  	case OpRsh8Ux64:
   488  		return rewriteValueMIPS_OpRsh8Ux64(v)
   489  	case OpRsh8Ux8:
   490  		return rewriteValueMIPS_OpRsh8Ux8(v)
   491  	case OpRsh8x16:
   492  		return rewriteValueMIPS_OpRsh8x16(v)
   493  	case OpRsh8x32:
   494  		return rewriteValueMIPS_OpRsh8x32(v)
   495  	case OpRsh8x64:
   496  		return rewriteValueMIPS_OpRsh8x64(v)
   497  	case OpRsh8x8:
   498  		return rewriteValueMIPS_OpRsh8x8(v)
   499  	case OpSelect0:
   500  		return rewriteValueMIPS_OpSelect0(v)
   501  	case OpSelect1:
   502  		return rewriteValueMIPS_OpSelect1(v)
   503  	case OpSignExt16to32:
   504  		v.Op = OpMIPSMOVHreg
   505  		return true
   506  	case OpSignExt8to16:
   507  		v.Op = OpMIPSMOVBreg
   508  		return true
   509  	case OpSignExt8to32:
   510  		v.Op = OpMIPSMOVBreg
   511  		return true
   512  	case OpSignmask:
   513  		return rewriteValueMIPS_OpSignmask(v)
   514  	case OpSlicemask:
   515  		return rewriteValueMIPS_OpSlicemask(v)
   516  	case OpSqrt:
   517  		v.Op = OpMIPSSQRTD
   518  		return true
   519  	case OpSqrt32:
   520  		v.Op = OpMIPSSQRTF
   521  		return true
   522  	case OpStaticCall:
   523  		v.Op = OpMIPSCALLstatic
   524  		return true
   525  	case OpStore:
   526  		return rewriteValueMIPS_OpStore(v)
   527  	case OpSub16:
   528  		v.Op = OpMIPSSUB
   529  		return true
   530  	case OpSub32:
   531  		v.Op = OpMIPSSUB
   532  		return true
   533  	case OpSub32F:
   534  		v.Op = OpMIPSSUBF
   535  		return true
   536  	case OpSub32withcarry:
   537  		return rewriteValueMIPS_OpSub32withcarry(v)
   538  	case OpSub64F:
   539  		v.Op = OpMIPSSUBD
   540  		return true
   541  	case OpSub8:
   542  		v.Op = OpMIPSSUB
   543  		return true
   544  	case OpSubPtr:
   545  		v.Op = OpMIPSSUB
   546  		return true
   547  	case OpTailCall:
   548  		v.Op = OpMIPSCALLtail
   549  		return true
   550  	case OpTrunc16to8:
   551  		v.Op = OpCopy
   552  		return true
   553  	case OpTrunc32to16:
   554  		v.Op = OpCopy
   555  		return true
   556  	case OpTrunc32to8:
   557  		v.Op = OpCopy
   558  		return true
   559  	case OpWB:
   560  		v.Op = OpMIPSLoweredWB
   561  		return true
   562  	case OpXor16:
   563  		v.Op = OpMIPSXOR
   564  		return true
   565  	case OpXor32:
   566  		v.Op = OpMIPSXOR
   567  		return true
   568  	case OpXor8:
   569  		v.Op = OpMIPSXOR
   570  		return true
   571  	case OpZero:
   572  		return rewriteValueMIPS_OpZero(v)
   573  	case OpZeroExt16to32:
   574  		v.Op = OpMIPSMOVHUreg
   575  		return true
   576  	case OpZeroExt8to16:
   577  		v.Op = OpMIPSMOVBUreg
   578  		return true
   579  	case OpZeroExt8to32:
   580  		v.Op = OpMIPSMOVBUreg
   581  		return true
   582  	case OpZeromask:
   583  		return rewriteValueMIPS_OpZeromask(v)
   584  	}
   585  	return false
   586  }
   587  func rewriteValueMIPS_OpAdd32withcarry(v *Value) bool {
   588  	v_2 := v.Args[2]
   589  	v_1 := v.Args[1]
   590  	v_0 := v.Args[0]
   591  	b := v.Block
   592  	// match: (Add32withcarry <t> x y c)
   593  	// result: (ADD c (ADD <t> x y))
   594  	for {
   595  		t := v.Type
   596  		x := v_0
   597  		y := v_1
   598  		c := v_2
   599  		v.reset(OpMIPSADD)
   600  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t)
   601  		v0.AddArg2(x, y)
   602  		v.AddArg2(c, v0)
   603  		return true
   604  	}
   605  }
   606  func rewriteValueMIPS_OpAddr(v *Value) bool {
   607  	v_0 := v.Args[0]
   608  	// match: (Addr {sym} base)
   609  	// result: (MOVWaddr {sym} base)
   610  	for {
   611  		sym := auxToSym(v.Aux)
   612  		base := v_0
   613  		v.reset(OpMIPSMOVWaddr)
   614  		v.Aux = symToAux(sym)
   615  		v.AddArg(base)
   616  		return true
   617  	}
   618  }
   619  func rewriteValueMIPS_OpAtomicAnd8(v *Value) bool {
   620  	v_2 := v.Args[2]
   621  	v_1 := v.Args[1]
   622  	v_0 := v.Args[0]
   623  	b := v.Block
   624  	config := b.Func.Config
   625  	typ := &b.Func.Config.Types
   626  	// match: (AtomicAnd8 ptr val mem)
   627  	// cond: !config.BigEndian
   628  	// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) (NORconst [0] <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))))) mem)
   629  	for {
   630  		ptr := v_0
   631  		val := v_1
   632  		mem := v_2
   633  		if !(!config.BigEndian) {
   634  			break
   635  		}
   636  		v.reset(OpMIPSLoweredAtomicAnd)
   637  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   638  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   639  		v1.AuxInt = int32ToAuxInt(^3)
   640  		v0.AddArg2(v1, ptr)
   641  		v2 := b.NewValue0(v.Pos, OpMIPSOR, typ.UInt32)
   642  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   643  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   644  		v4.AddArg(val)
   645  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   646  		v5.AuxInt = int32ToAuxInt(3)
   647  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   648  		v6.AuxInt = int32ToAuxInt(3)
   649  		v6.AddArg(ptr)
   650  		v5.AddArg(v6)
   651  		v3.AddArg2(v4, v5)
   652  		v7 := b.NewValue0(v.Pos, OpMIPSNORconst, typ.UInt32)
   653  		v7.AuxInt = int32ToAuxInt(0)
   654  		v8 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   655  		v9 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   656  		v9.AuxInt = int32ToAuxInt(0xff)
   657  		v8.AddArg2(v9, v5)
   658  		v7.AddArg(v8)
   659  		v2.AddArg2(v3, v7)
   660  		v.AddArg3(v0, v2, mem)
   661  		return true
   662  	}
   663  	// match: (AtomicAnd8 ptr val mem)
   664  	// cond: config.BigEndian
   665  	// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) (NORconst [0] <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))))) mem)
   666  	for {
   667  		ptr := v_0
   668  		val := v_1
   669  		mem := v_2
   670  		if !(config.BigEndian) {
   671  			break
   672  		}
   673  		v.reset(OpMIPSLoweredAtomicAnd)
   674  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   675  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   676  		v1.AuxInt = int32ToAuxInt(^3)
   677  		v0.AddArg2(v1, ptr)
   678  		v2 := b.NewValue0(v.Pos, OpMIPSOR, typ.UInt32)
   679  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   680  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   681  		v4.AddArg(val)
   682  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   683  		v5.AuxInt = int32ToAuxInt(3)
   684  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   685  		v6.AuxInt = int32ToAuxInt(3)
   686  		v7 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32)
   687  		v7.AuxInt = int32ToAuxInt(3)
   688  		v7.AddArg(ptr)
   689  		v6.AddArg(v7)
   690  		v5.AddArg(v6)
   691  		v3.AddArg2(v4, v5)
   692  		v8 := b.NewValue0(v.Pos, OpMIPSNORconst, typ.UInt32)
   693  		v8.AuxInt = int32ToAuxInt(0)
   694  		v9 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   695  		v10 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   696  		v10.AuxInt = int32ToAuxInt(0xff)
   697  		v9.AddArg2(v10, v5)
   698  		v8.AddArg(v9)
   699  		v2.AddArg2(v3, v8)
   700  		v.AddArg3(v0, v2, mem)
   701  		return true
   702  	}
   703  	return false
   704  }
   705  func rewriteValueMIPS_OpAtomicOr8(v *Value) bool {
   706  	v_2 := v.Args[2]
   707  	v_1 := v.Args[1]
   708  	v_0 := v.Args[0]
   709  	b := v.Block
   710  	config := b.Func.Config
   711  	typ := &b.Func.Config.Types
   712  	// match: (AtomicOr8 ptr val mem)
   713  	// cond: !config.BigEndian
   714  	// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) mem)
   715  	for {
   716  		ptr := v_0
   717  		val := v_1
   718  		mem := v_2
   719  		if !(!config.BigEndian) {
   720  			break
   721  		}
   722  		v.reset(OpMIPSLoweredAtomicOr)
   723  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   724  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   725  		v1.AuxInt = int32ToAuxInt(^3)
   726  		v0.AddArg2(v1, ptr)
   727  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   728  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   729  		v3.AddArg(val)
   730  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   731  		v4.AuxInt = int32ToAuxInt(3)
   732  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   733  		v5.AuxInt = int32ToAuxInt(3)
   734  		v5.AddArg(ptr)
   735  		v4.AddArg(v5)
   736  		v2.AddArg2(v3, v4)
   737  		v.AddArg3(v0, v2, mem)
   738  		return true
   739  	}
   740  	// match: (AtomicOr8 ptr val mem)
   741  	// cond: config.BigEndian
   742  	// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) mem)
   743  	for {
   744  		ptr := v_0
   745  		val := v_1
   746  		mem := v_2
   747  		if !(config.BigEndian) {
   748  			break
   749  		}
   750  		v.reset(OpMIPSLoweredAtomicOr)
   751  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   752  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   753  		v1.AuxInt = int32ToAuxInt(^3)
   754  		v0.AddArg2(v1, ptr)
   755  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   756  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   757  		v3.AddArg(val)
   758  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   759  		v4.AuxInt = int32ToAuxInt(3)
   760  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   761  		v5.AuxInt = int32ToAuxInt(3)
   762  		v6 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32)
   763  		v6.AuxInt = int32ToAuxInt(3)
   764  		v6.AddArg(ptr)
   765  		v5.AddArg(v6)
   766  		v4.AddArg(v5)
   767  		v2.AddArg2(v3, v4)
   768  		v.AddArg3(v0, v2, mem)
   769  		return true
   770  	}
   771  	return false
   772  }
   773  func rewriteValueMIPS_OpAvg32u(v *Value) bool {
   774  	v_1 := v.Args[1]
   775  	v_0 := v.Args[0]
   776  	b := v.Block
   777  	// match: (Avg32u <t> x y)
   778  	// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
   779  	for {
   780  		t := v.Type
   781  		x := v_0
   782  		y := v_1
   783  		v.reset(OpMIPSADD)
   784  		v0 := b.NewValue0(v.Pos, OpMIPSSRLconst, t)
   785  		v0.AuxInt = int32ToAuxInt(1)
   786  		v1 := b.NewValue0(v.Pos, OpMIPSSUB, t)
   787  		v1.AddArg2(x, y)
   788  		v0.AddArg(v1)
   789  		v.AddArg2(v0, y)
   790  		return true
   791  	}
   792  }
   793  func rewriteValueMIPS_OpBitLen32(v *Value) bool {
   794  	v_0 := v.Args[0]
   795  	b := v.Block
   796  	typ := &b.Func.Config.Types
   797  	// match: (BitLen32 <t> x)
   798  	// result: (SUB (MOVWconst [32]) (CLZ <t> x))
   799  	for {
   800  		t := v.Type
   801  		x := v_0
   802  		v.reset(OpMIPSSUB)
   803  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   804  		v0.AuxInt = int32ToAuxInt(32)
   805  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
   806  		v1.AddArg(x)
   807  		v.AddArg2(v0, v1)
   808  		return true
   809  	}
   810  }
   811  func rewriteValueMIPS_OpCom16(v *Value) bool {
   812  	v_0 := v.Args[0]
   813  	// match: (Com16 x)
   814  	// result: (NORconst [0] x)
   815  	for {
   816  		x := v_0
   817  		v.reset(OpMIPSNORconst)
   818  		v.AuxInt = int32ToAuxInt(0)
   819  		v.AddArg(x)
   820  		return true
   821  	}
   822  }
   823  func rewriteValueMIPS_OpCom32(v *Value) bool {
   824  	v_0 := v.Args[0]
   825  	// match: (Com32 x)
   826  	// result: (NORconst [0] x)
   827  	for {
   828  		x := v_0
   829  		v.reset(OpMIPSNORconst)
   830  		v.AuxInt = int32ToAuxInt(0)
   831  		v.AddArg(x)
   832  		return true
   833  	}
   834  }
   835  func rewriteValueMIPS_OpCom8(v *Value) bool {
   836  	v_0 := v.Args[0]
   837  	// match: (Com8 x)
   838  	// result: (NORconst [0] x)
   839  	for {
   840  		x := v_0
   841  		v.reset(OpMIPSNORconst)
   842  		v.AuxInt = int32ToAuxInt(0)
   843  		v.AddArg(x)
   844  		return true
   845  	}
   846  }
   847  func rewriteValueMIPS_OpConst16(v *Value) bool {
   848  	// match: (Const16 [val])
   849  	// result: (MOVWconst [int32(val)])
   850  	for {
   851  		val := auxIntToInt16(v.AuxInt)
   852  		v.reset(OpMIPSMOVWconst)
   853  		v.AuxInt = int32ToAuxInt(int32(val))
   854  		return true
   855  	}
   856  }
   857  func rewriteValueMIPS_OpConst32(v *Value) bool {
   858  	// match: (Const32 [val])
   859  	// result: (MOVWconst [int32(val)])
   860  	for {
   861  		val := auxIntToInt32(v.AuxInt)
   862  		v.reset(OpMIPSMOVWconst)
   863  		v.AuxInt = int32ToAuxInt(int32(val))
   864  		return true
   865  	}
   866  }
   867  func rewriteValueMIPS_OpConst8(v *Value) bool {
   868  	// match: (Const8 [val])
   869  	// result: (MOVWconst [int32(val)])
   870  	for {
   871  		val := auxIntToInt8(v.AuxInt)
   872  		v.reset(OpMIPSMOVWconst)
   873  		v.AuxInt = int32ToAuxInt(int32(val))
   874  		return true
   875  	}
   876  }
   877  func rewriteValueMIPS_OpConstBool(v *Value) bool {
   878  	// match: (ConstBool [t])
   879  	// result: (MOVWconst [b2i32(t)])
   880  	for {
   881  		t := auxIntToBool(v.AuxInt)
   882  		v.reset(OpMIPSMOVWconst)
   883  		v.AuxInt = int32ToAuxInt(b2i32(t))
   884  		return true
   885  	}
   886  }
   887  func rewriteValueMIPS_OpConstNil(v *Value) bool {
   888  	// match: (ConstNil)
   889  	// result: (MOVWconst [0])
   890  	for {
   891  		v.reset(OpMIPSMOVWconst)
   892  		v.AuxInt = int32ToAuxInt(0)
   893  		return true
   894  	}
   895  }
   896  func rewriteValueMIPS_OpCtz32(v *Value) bool {
   897  	v_0 := v.Args[0]
   898  	b := v.Block
   899  	typ := &b.Func.Config.Types
   900  	// match: (Ctz32 <t> x)
   901  	// result: (SUB (MOVWconst [32]) (CLZ <t> (SUBconst <t> [1] (AND <t> x (NEG <t> x)))))
   902  	for {
   903  		t := v.Type
   904  		x := v_0
   905  		v.reset(OpMIPSSUB)
   906  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   907  		v0.AuxInt = int32ToAuxInt(32)
   908  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
   909  		v2 := b.NewValue0(v.Pos, OpMIPSSUBconst, t)
   910  		v2.AuxInt = int32ToAuxInt(1)
   911  		v3 := b.NewValue0(v.Pos, OpMIPSAND, t)
   912  		v4 := b.NewValue0(v.Pos, OpMIPSNEG, t)
   913  		v4.AddArg(x)
   914  		v3.AddArg2(x, v4)
   915  		v2.AddArg(v3)
   916  		v1.AddArg(v2)
   917  		v.AddArg2(v0, v1)
   918  		return true
   919  	}
   920  }
   921  func rewriteValueMIPS_OpDiv16(v *Value) bool {
   922  	v_1 := v.Args[1]
   923  	v_0 := v.Args[0]
   924  	b := v.Block
   925  	typ := &b.Func.Config.Types
   926  	// match: (Div16 x y)
   927  	// result: (Select1 (DIV (SignExt16to32 x) (SignExt16to32 y)))
   928  	for {
   929  		x := v_0
   930  		y := v_1
   931  		v.reset(OpSelect1)
   932  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
   933  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
   934  		v1.AddArg(x)
   935  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
   936  		v2.AddArg(y)
   937  		v0.AddArg2(v1, v2)
   938  		v.AddArg(v0)
   939  		return true
   940  	}
   941  }
   942  func rewriteValueMIPS_OpDiv16u(v *Value) bool {
   943  	v_1 := v.Args[1]
   944  	v_0 := v.Args[0]
   945  	b := v.Block
   946  	typ := &b.Func.Config.Types
   947  	// match: (Div16u x y)
   948  	// result: (Select1 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
   949  	for {
   950  		x := v_0
   951  		y := v_1
   952  		v.reset(OpSelect1)
   953  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
   954  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
   955  		v1.AddArg(x)
   956  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
   957  		v2.AddArg(y)
   958  		v0.AddArg2(v1, v2)
   959  		v.AddArg(v0)
   960  		return true
   961  	}
   962  }
   963  func rewriteValueMIPS_OpDiv32(v *Value) bool {
   964  	v_1 := v.Args[1]
   965  	v_0 := v.Args[0]
   966  	b := v.Block
   967  	typ := &b.Func.Config.Types
   968  	// match: (Div32 x y)
   969  	// result: (Select1 (DIV x y))
   970  	for {
   971  		x := v_0
   972  		y := v_1
   973  		v.reset(OpSelect1)
   974  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
   975  		v0.AddArg2(x, y)
   976  		v.AddArg(v0)
   977  		return true
   978  	}
   979  }
   980  func rewriteValueMIPS_OpDiv32u(v *Value) bool {
   981  	v_1 := v.Args[1]
   982  	v_0 := v.Args[0]
   983  	b := v.Block
   984  	typ := &b.Func.Config.Types
   985  	// match: (Div32u x y)
   986  	// result: (Select1 (DIVU x y))
   987  	for {
   988  		x := v_0
   989  		y := v_1
   990  		v.reset(OpSelect1)
   991  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
   992  		v0.AddArg2(x, y)
   993  		v.AddArg(v0)
   994  		return true
   995  	}
   996  }
   997  func rewriteValueMIPS_OpDiv8(v *Value) bool {
   998  	v_1 := v.Args[1]
   999  	v_0 := v.Args[0]
  1000  	b := v.Block
  1001  	typ := &b.Func.Config.Types
  1002  	// match: (Div8 x y)
  1003  	// result: (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y)))
  1004  	for {
  1005  		x := v_0
  1006  		y := v_1
  1007  		v.reset(OpSelect1)
  1008  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1009  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1010  		v1.AddArg(x)
  1011  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1012  		v2.AddArg(y)
  1013  		v0.AddArg2(v1, v2)
  1014  		v.AddArg(v0)
  1015  		return true
  1016  	}
  1017  }
  1018  func rewriteValueMIPS_OpDiv8u(v *Value) bool {
  1019  	v_1 := v.Args[1]
  1020  	v_0 := v.Args[0]
  1021  	b := v.Block
  1022  	typ := &b.Func.Config.Types
  1023  	// match: (Div8u x y)
  1024  	// result: (Select1 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1025  	for {
  1026  		x := v_0
  1027  		y := v_1
  1028  		v.reset(OpSelect1)
  1029  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1030  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1031  		v1.AddArg(x)
  1032  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1033  		v2.AddArg(y)
  1034  		v0.AddArg2(v1, v2)
  1035  		v.AddArg(v0)
  1036  		return true
  1037  	}
  1038  }
  1039  func rewriteValueMIPS_OpEq16(v *Value) bool {
  1040  	v_1 := v.Args[1]
  1041  	v_0 := v.Args[0]
  1042  	b := v.Block
  1043  	typ := &b.Func.Config.Types
  1044  	// match: (Eq16 x y)
  1045  	// result: (SGTUconst [1] (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1046  	for {
  1047  		x := v_0
  1048  		y := v_1
  1049  		v.reset(OpMIPSSGTUconst)
  1050  		v.AuxInt = int32ToAuxInt(1)
  1051  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1052  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1053  		v1.AddArg(x)
  1054  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1055  		v2.AddArg(y)
  1056  		v0.AddArg2(v1, v2)
  1057  		v.AddArg(v0)
  1058  		return true
  1059  	}
  1060  }
  1061  func rewriteValueMIPS_OpEq32(v *Value) bool {
  1062  	v_1 := v.Args[1]
  1063  	v_0 := v.Args[0]
  1064  	b := v.Block
  1065  	typ := &b.Func.Config.Types
  1066  	// match: (Eq32 x y)
  1067  	// result: (SGTUconst [1] (XOR x y))
  1068  	for {
  1069  		x := v_0
  1070  		y := v_1
  1071  		v.reset(OpMIPSSGTUconst)
  1072  		v.AuxInt = int32ToAuxInt(1)
  1073  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1074  		v0.AddArg2(x, y)
  1075  		v.AddArg(v0)
  1076  		return true
  1077  	}
  1078  }
  1079  func rewriteValueMIPS_OpEq32F(v *Value) bool {
  1080  	v_1 := v.Args[1]
  1081  	v_0 := v.Args[0]
  1082  	b := v.Block
  1083  	// match: (Eq32F x y)
  1084  	// result: (FPFlagTrue (CMPEQF x y))
  1085  	for {
  1086  		x := v_0
  1087  		y := v_1
  1088  		v.reset(OpMIPSFPFlagTrue)
  1089  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
  1090  		v0.AddArg2(x, y)
  1091  		v.AddArg(v0)
  1092  		return true
  1093  	}
  1094  }
  1095  func rewriteValueMIPS_OpEq64F(v *Value) bool {
  1096  	v_1 := v.Args[1]
  1097  	v_0 := v.Args[0]
  1098  	b := v.Block
  1099  	// match: (Eq64F x y)
  1100  	// result: (FPFlagTrue (CMPEQD x y))
  1101  	for {
  1102  		x := v_0
  1103  		y := v_1
  1104  		v.reset(OpMIPSFPFlagTrue)
  1105  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
  1106  		v0.AddArg2(x, y)
  1107  		v.AddArg(v0)
  1108  		return true
  1109  	}
  1110  }
  1111  func rewriteValueMIPS_OpEq8(v *Value) bool {
  1112  	v_1 := v.Args[1]
  1113  	v_0 := v.Args[0]
  1114  	b := v.Block
  1115  	typ := &b.Func.Config.Types
  1116  	// match: (Eq8 x y)
  1117  	// result: (SGTUconst [1] (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1118  	for {
  1119  		x := v_0
  1120  		y := v_1
  1121  		v.reset(OpMIPSSGTUconst)
  1122  		v.AuxInt = int32ToAuxInt(1)
  1123  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1124  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1125  		v1.AddArg(x)
  1126  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1127  		v2.AddArg(y)
  1128  		v0.AddArg2(v1, v2)
  1129  		v.AddArg(v0)
  1130  		return true
  1131  	}
  1132  }
  1133  func rewriteValueMIPS_OpEqB(v *Value) bool {
  1134  	v_1 := v.Args[1]
  1135  	v_0 := v.Args[0]
  1136  	b := v.Block
  1137  	typ := &b.Func.Config.Types
  1138  	// match: (EqB x y)
  1139  	// result: (XORconst [1] (XOR <typ.Bool> x y))
  1140  	for {
  1141  		x := v_0
  1142  		y := v_1
  1143  		v.reset(OpMIPSXORconst)
  1144  		v.AuxInt = int32ToAuxInt(1)
  1145  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.Bool)
  1146  		v0.AddArg2(x, y)
  1147  		v.AddArg(v0)
  1148  		return true
  1149  	}
  1150  }
  1151  func rewriteValueMIPS_OpEqPtr(v *Value) bool {
  1152  	v_1 := v.Args[1]
  1153  	v_0 := v.Args[0]
  1154  	b := v.Block
  1155  	typ := &b.Func.Config.Types
  1156  	// match: (EqPtr x y)
  1157  	// result: (SGTUconst [1] (XOR x y))
  1158  	for {
  1159  		x := v_0
  1160  		y := v_1
  1161  		v.reset(OpMIPSSGTUconst)
  1162  		v.AuxInt = int32ToAuxInt(1)
  1163  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1164  		v0.AddArg2(x, y)
  1165  		v.AddArg(v0)
  1166  		return true
  1167  	}
  1168  }
  1169  func rewriteValueMIPS_OpHmul32(v *Value) bool {
  1170  	v_1 := v.Args[1]
  1171  	v_0 := v.Args[0]
  1172  	b := v.Block
  1173  	typ := &b.Func.Config.Types
  1174  	// match: (Hmul32 x y)
  1175  	// result: (Select0 (MULT x y))
  1176  	for {
  1177  		x := v_0
  1178  		y := v_1
  1179  		v.reset(OpSelect0)
  1180  		v0 := b.NewValue0(v.Pos, OpMIPSMULT, types.NewTuple(typ.Int32, typ.Int32))
  1181  		v0.AddArg2(x, y)
  1182  		v.AddArg(v0)
  1183  		return true
  1184  	}
  1185  }
  1186  func rewriteValueMIPS_OpHmul32u(v *Value) bool {
  1187  	v_1 := v.Args[1]
  1188  	v_0 := v.Args[0]
  1189  	b := v.Block
  1190  	typ := &b.Func.Config.Types
  1191  	// match: (Hmul32u x y)
  1192  	// result: (Select0 (MULTU x y))
  1193  	for {
  1194  		x := v_0
  1195  		y := v_1
  1196  		v.reset(OpSelect0)
  1197  		v0 := b.NewValue0(v.Pos, OpMIPSMULTU, types.NewTuple(typ.UInt32, typ.UInt32))
  1198  		v0.AddArg2(x, y)
  1199  		v.AddArg(v0)
  1200  		return true
  1201  	}
  1202  }
  1203  func rewriteValueMIPS_OpIsInBounds(v *Value) bool {
  1204  	v_1 := v.Args[1]
  1205  	v_0 := v.Args[0]
  1206  	// match: (IsInBounds idx len)
  1207  	// result: (SGTU len idx)
  1208  	for {
  1209  		idx := v_0
  1210  		len := v_1
  1211  		v.reset(OpMIPSSGTU)
  1212  		v.AddArg2(len, idx)
  1213  		return true
  1214  	}
  1215  }
  1216  func rewriteValueMIPS_OpIsNonNil(v *Value) bool {
  1217  	v_0 := v.Args[0]
  1218  	b := v.Block
  1219  	typ := &b.Func.Config.Types
  1220  	// match: (IsNonNil ptr)
  1221  	// result: (SGTU ptr (MOVWconst [0]))
  1222  	for {
  1223  		ptr := v_0
  1224  		v.reset(OpMIPSSGTU)
  1225  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1226  		v0.AuxInt = int32ToAuxInt(0)
  1227  		v.AddArg2(ptr, v0)
  1228  		return true
  1229  	}
  1230  }
  1231  func rewriteValueMIPS_OpIsSliceInBounds(v *Value) bool {
  1232  	v_1 := v.Args[1]
  1233  	v_0 := v.Args[0]
  1234  	b := v.Block
  1235  	typ := &b.Func.Config.Types
  1236  	// match: (IsSliceInBounds idx len)
  1237  	// result: (XORconst [1] (SGTU idx len))
  1238  	for {
  1239  		idx := v_0
  1240  		len := v_1
  1241  		v.reset(OpMIPSXORconst)
  1242  		v.AuxInt = int32ToAuxInt(1)
  1243  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1244  		v0.AddArg2(idx, len)
  1245  		v.AddArg(v0)
  1246  		return true
  1247  	}
  1248  }
  1249  func rewriteValueMIPS_OpLeq16(v *Value) bool {
  1250  	v_1 := v.Args[1]
  1251  	v_0 := v.Args[0]
  1252  	b := v.Block
  1253  	typ := &b.Func.Config.Types
  1254  	// match: (Leq16 x y)
  1255  	// result: (XORconst [1] (SGT (SignExt16to32 x) (SignExt16to32 y)))
  1256  	for {
  1257  		x := v_0
  1258  		y := v_1
  1259  		v.reset(OpMIPSXORconst)
  1260  		v.AuxInt = int32ToAuxInt(1)
  1261  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1262  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1263  		v1.AddArg(x)
  1264  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1265  		v2.AddArg(y)
  1266  		v0.AddArg2(v1, v2)
  1267  		v.AddArg(v0)
  1268  		return true
  1269  	}
  1270  }
  1271  func rewriteValueMIPS_OpLeq16U(v *Value) bool {
  1272  	v_1 := v.Args[1]
  1273  	v_0 := v.Args[0]
  1274  	b := v.Block
  1275  	typ := &b.Func.Config.Types
  1276  	// match: (Leq16U x y)
  1277  	// result: (XORconst [1] (SGTU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1278  	for {
  1279  		x := v_0
  1280  		y := v_1
  1281  		v.reset(OpMIPSXORconst)
  1282  		v.AuxInt = int32ToAuxInt(1)
  1283  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1284  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1285  		v1.AddArg(x)
  1286  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1287  		v2.AddArg(y)
  1288  		v0.AddArg2(v1, v2)
  1289  		v.AddArg(v0)
  1290  		return true
  1291  	}
  1292  }
  1293  func rewriteValueMIPS_OpLeq32(v *Value) bool {
  1294  	v_1 := v.Args[1]
  1295  	v_0 := v.Args[0]
  1296  	b := v.Block
  1297  	typ := &b.Func.Config.Types
  1298  	// match: (Leq32 x y)
  1299  	// result: (XORconst [1] (SGT x y))
  1300  	for {
  1301  		x := v_0
  1302  		y := v_1
  1303  		v.reset(OpMIPSXORconst)
  1304  		v.AuxInt = int32ToAuxInt(1)
  1305  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1306  		v0.AddArg2(x, y)
  1307  		v.AddArg(v0)
  1308  		return true
  1309  	}
  1310  }
  1311  func rewriteValueMIPS_OpLeq32F(v *Value) bool {
  1312  	v_1 := v.Args[1]
  1313  	v_0 := v.Args[0]
  1314  	b := v.Block
  1315  	// match: (Leq32F x y)
  1316  	// result: (FPFlagTrue (CMPGEF y x))
  1317  	for {
  1318  		x := v_0
  1319  		y := v_1
  1320  		v.reset(OpMIPSFPFlagTrue)
  1321  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGEF, types.TypeFlags)
  1322  		v0.AddArg2(y, x)
  1323  		v.AddArg(v0)
  1324  		return true
  1325  	}
  1326  }
  1327  func rewriteValueMIPS_OpLeq32U(v *Value) bool {
  1328  	v_1 := v.Args[1]
  1329  	v_0 := v.Args[0]
  1330  	b := v.Block
  1331  	typ := &b.Func.Config.Types
  1332  	// match: (Leq32U x y)
  1333  	// result: (XORconst [1] (SGTU x y))
  1334  	for {
  1335  		x := v_0
  1336  		y := v_1
  1337  		v.reset(OpMIPSXORconst)
  1338  		v.AuxInt = int32ToAuxInt(1)
  1339  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1340  		v0.AddArg2(x, y)
  1341  		v.AddArg(v0)
  1342  		return true
  1343  	}
  1344  }
  1345  func rewriteValueMIPS_OpLeq64F(v *Value) bool {
  1346  	v_1 := v.Args[1]
  1347  	v_0 := v.Args[0]
  1348  	b := v.Block
  1349  	// match: (Leq64F x y)
  1350  	// result: (FPFlagTrue (CMPGED y x))
  1351  	for {
  1352  		x := v_0
  1353  		y := v_1
  1354  		v.reset(OpMIPSFPFlagTrue)
  1355  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGED, types.TypeFlags)
  1356  		v0.AddArg2(y, x)
  1357  		v.AddArg(v0)
  1358  		return true
  1359  	}
  1360  }
  1361  func rewriteValueMIPS_OpLeq8(v *Value) bool {
  1362  	v_1 := v.Args[1]
  1363  	v_0 := v.Args[0]
  1364  	b := v.Block
  1365  	typ := &b.Func.Config.Types
  1366  	// match: (Leq8 x y)
  1367  	// result: (XORconst [1] (SGT (SignExt8to32 x) (SignExt8to32 y)))
  1368  	for {
  1369  		x := v_0
  1370  		y := v_1
  1371  		v.reset(OpMIPSXORconst)
  1372  		v.AuxInt = int32ToAuxInt(1)
  1373  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1374  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1375  		v1.AddArg(x)
  1376  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1377  		v2.AddArg(y)
  1378  		v0.AddArg2(v1, v2)
  1379  		v.AddArg(v0)
  1380  		return true
  1381  	}
  1382  }
  1383  func rewriteValueMIPS_OpLeq8U(v *Value) bool {
  1384  	v_1 := v.Args[1]
  1385  	v_0 := v.Args[0]
  1386  	b := v.Block
  1387  	typ := &b.Func.Config.Types
  1388  	// match: (Leq8U x y)
  1389  	// result: (XORconst [1] (SGTU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1390  	for {
  1391  		x := v_0
  1392  		y := v_1
  1393  		v.reset(OpMIPSXORconst)
  1394  		v.AuxInt = int32ToAuxInt(1)
  1395  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1396  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1397  		v1.AddArg(x)
  1398  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1399  		v2.AddArg(y)
  1400  		v0.AddArg2(v1, v2)
  1401  		v.AddArg(v0)
  1402  		return true
  1403  	}
  1404  }
  1405  func rewriteValueMIPS_OpLess16(v *Value) bool {
  1406  	v_1 := v.Args[1]
  1407  	v_0 := v.Args[0]
  1408  	b := v.Block
  1409  	typ := &b.Func.Config.Types
  1410  	// match: (Less16 x y)
  1411  	// result: (SGT (SignExt16to32 y) (SignExt16to32 x))
  1412  	for {
  1413  		x := v_0
  1414  		y := v_1
  1415  		v.reset(OpMIPSSGT)
  1416  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1417  		v0.AddArg(y)
  1418  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1419  		v1.AddArg(x)
  1420  		v.AddArg2(v0, v1)
  1421  		return true
  1422  	}
  1423  }
  1424  func rewriteValueMIPS_OpLess16U(v *Value) bool {
  1425  	v_1 := v.Args[1]
  1426  	v_0 := v.Args[0]
  1427  	b := v.Block
  1428  	typ := &b.Func.Config.Types
  1429  	// match: (Less16U x y)
  1430  	// result: (SGTU (ZeroExt16to32 y) (ZeroExt16to32 x))
  1431  	for {
  1432  		x := v_0
  1433  		y := v_1
  1434  		v.reset(OpMIPSSGTU)
  1435  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1436  		v0.AddArg(y)
  1437  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1438  		v1.AddArg(x)
  1439  		v.AddArg2(v0, v1)
  1440  		return true
  1441  	}
  1442  }
  1443  func rewriteValueMIPS_OpLess32(v *Value) bool {
  1444  	v_1 := v.Args[1]
  1445  	v_0 := v.Args[0]
  1446  	// match: (Less32 x y)
  1447  	// result: (SGT y x)
  1448  	for {
  1449  		x := v_0
  1450  		y := v_1
  1451  		v.reset(OpMIPSSGT)
  1452  		v.AddArg2(y, x)
  1453  		return true
  1454  	}
  1455  }
  1456  func rewriteValueMIPS_OpLess32F(v *Value) bool {
  1457  	v_1 := v.Args[1]
  1458  	v_0 := v.Args[0]
  1459  	b := v.Block
  1460  	// match: (Less32F x y)
  1461  	// result: (FPFlagTrue (CMPGTF y x))
  1462  	for {
  1463  		x := v_0
  1464  		y := v_1
  1465  		v.reset(OpMIPSFPFlagTrue)
  1466  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTF, types.TypeFlags)
  1467  		v0.AddArg2(y, x)
  1468  		v.AddArg(v0)
  1469  		return true
  1470  	}
  1471  }
  1472  func rewriteValueMIPS_OpLess32U(v *Value) bool {
  1473  	v_1 := v.Args[1]
  1474  	v_0 := v.Args[0]
  1475  	// match: (Less32U x y)
  1476  	// result: (SGTU y x)
  1477  	for {
  1478  		x := v_0
  1479  		y := v_1
  1480  		v.reset(OpMIPSSGTU)
  1481  		v.AddArg2(y, x)
  1482  		return true
  1483  	}
  1484  }
  1485  func rewriteValueMIPS_OpLess64F(v *Value) bool {
  1486  	v_1 := v.Args[1]
  1487  	v_0 := v.Args[0]
  1488  	b := v.Block
  1489  	// match: (Less64F x y)
  1490  	// result: (FPFlagTrue (CMPGTD y x))
  1491  	for {
  1492  		x := v_0
  1493  		y := v_1
  1494  		v.reset(OpMIPSFPFlagTrue)
  1495  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTD, types.TypeFlags)
  1496  		v0.AddArg2(y, x)
  1497  		v.AddArg(v0)
  1498  		return true
  1499  	}
  1500  }
  1501  func rewriteValueMIPS_OpLess8(v *Value) bool {
  1502  	v_1 := v.Args[1]
  1503  	v_0 := v.Args[0]
  1504  	b := v.Block
  1505  	typ := &b.Func.Config.Types
  1506  	// match: (Less8 x y)
  1507  	// result: (SGT (SignExt8to32 y) (SignExt8to32 x))
  1508  	for {
  1509  		x := v_0
  1510  		y := v_1
  1511  		v.reset(OpMIPSSGT)
  1512  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1513  		v0.AddArg(y)
  1514  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1515  		v1.AddArg(x)
  1516  		v.AddArg2(v0, v1)
  1517  		return true
  1518  	}
  1519  }
  1520  func rewriteValueMIPS_OpLess8U(v *Value) bool {
  1521  	v_1 := v.Args[1]
  1522  	v_0 := v.Args[0]
  1523  	b := v.Block
  1524  	typ := &b.Func.Config.Types
  1525  	// match: (Less8U x y)
  1526  	// result: (SGTU (ZeroExt8to32 y) (ZeroExt8to32 x))
  1527  	for {
  1528  		x := v_0
  1529  		y := v_1
  1530  		v.reset(OpMIPSSGTU)
  1531  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1532  		v0.AddArg(y)
  1533  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1534  		v1.AddArg(x)
  1535  		v.AddArg2(v0, v1)
  1536  		return true
  1537  	}
  1538  }
  1539  func rewriteValueMIPS_OpLoad(v *Value) bool {
  1540  	v_1 := v.Args[1]
  1541  	v_0 := v.Args[0]
  1542  	// match: (Load <t> ptr mem)
  1543  	// cond: t.IsBoolean()
  1544  	// result: (MOVBUload ptr mem)
  1545  	for {
  1546  		t := v.Type
  1547  		ptr := v_0
  1548  		mem := v_1
  1549  		if !(t.IsBoolean()) {
  1550  			break
  1551  		}
  1552  		v.reset(OpMIPSMOVBUload)
  1553  		v.AddArg2(ptr, mem)
  1554  		return true
  1555  	}
  1556  	// match: (Load <t> ptr mem)
  1557  	// cond: (is8BitInt(t) && isSigned(t))
  1558  	// result: (MOVBload ptr mem)
  1559  	for {
  1560  		t := v.Type
  1561  		ptr := v_0
  1562  		mem := v_1
  1563  		if !(is8BitInt(t) && isSigned(t)) {
  1564  			break
  1565  		}
  1566  		v.reset(OpMIPSMOVBload)
  1567  		v.AddArg2(ptr, mem)
  1568  		return true
  1569  	}
  1570  	// match: (Load <t> ptr mem)
  1571  	// cond: (is8BitInt(t) && !isSigned(t))
  1572  	// result: (MOVBUload ptr mem)
  1573  	for {
  1574  		t := v.Type
  1575  		ptr := v_0
  1576  		mem := v_1
  1577  		if !(is8BitInt(t) && !isSigned(t)) {
  1578  			break
  1579  		}
  1580  		v.reset(OpMIPSMOVBUload)
  1581  		v.AddArg2(ptr, mem)
  1582  		return true
  1583  	}
  1584  	// match: (Load <t> ptr mem)
  1585  	// cond: (is16BitInt(t) && isSigned(t))
  1586  	// result: (MOVHload ptr mem)
  1587  	for {
  1588  		t := v.Type
  1589  		ptr := v_0
  1590  		mem := v_1
  1591  		if !(is16BitInt(t) && isSigned(t)) {
  1592  			break
  1593  		}
  1594  		v.reset(OpMIPSMOVHload)
  1595  		v.AddArg2(ptr, mem)
  1596  		return true
  1597  	}
  1598  	// match: (Load <t> ptr mem)
  1599  	// cond: (is16BitInt(t) && !isSigned(t))
  1600  	// result: (MOVHUload ptr mem)
  1601  	for {
  1602  		t := v.Type
  1603  		ptr := v_0
  1604  		mem := v_1
  1605  		if !(is16BitInt(t) && !isSigned(t)) {
  1606  			break
  1607  		}
  1608  		v.reset(OpMIPSMOVHUload)
  1609  		v.AddArg2(ptr, mem)
  1610  		return true
  1611  	}
  1612  	// match: (Load <t> ptr mem)
  1613  	// cond: (is32BitInt(t) || isPtr(t))
  1614  	// result: (MOVWload ptr mem)
  1615  	for {
  1616  		t := v.Type
  1617  		ptr := v_0
  1618  		mem := v_1
  1619  		if !(is32BitInt(t) || isPtr(t)) {
  1620  			break
  1621  		}
  1622  		v.reset(OpMIPSMOVWload)
  1623  		v.AddArg2(ptr, mem)
  1624  		return true
  1625  	}
  1626  	// match: (Load <t> ptr mem)
  1627  	// cond: is32BitFloat(t)
  1628  	// result: (MOVFload ptr mem)
  1629  	for {
  1630  		t := v.Type
  1631  		ptr := v_0
  1632  		mem := v_1
  1633  		if !(is32BitFloat(t)) {
  1634  			break
  1635  		}
  1636  		v.reset(OpMIPSMOVFload)
  1637  		v.AddArg2(ptr, mem)
  1638  		return true
  1639  	}
  1640  	// match: (Load <t> ptr mem)
  1641  	// cond: is64BitFloat(t)
  1642  	// result: (MOVDload ptr mem)
  1643  	for {
  1644  		t := v.Type
  1645  		ptr := v_0
  1646  		mem := v_1
  1647  		if !(is64BitFloat(t)) {
  1648  			break
  1649  		}
  1650  		v.reset(OpMIPSMOVDload)
  1651  		v.AddArg2(ptr, mem)
  1652  		return true
  1653  	}
  1654  	return false
  1655  }
  1656  func rewriteValueMIPS_OpLocalAddr(v *Value) bool {
  1657  	v_0 := v.Args[0]
  1658  	// match: (LocalAddr {sym} base _)
  1659  	// result: (MOVWaddr {sym} base)
  1660  	for {
  1661  		sym := auxToSym(v.Aux)
  1662  		base := v_0
  1663  		v.reset(OpMIPSMOVWaddr)
  1664  		v.Aux = symToAux(sym)
  1665  		v.AddArg(base)
  1666  		return true
  1667  	}
  1668  }
  1669  func rewriteValueMIPS_OpLsh16x16(v *Value) bool {
  1670  	v_1 := v.Args[1]
  1671  	v_0 := v.Args[0]
  1672  	b := v.Block
  1673  	typ := &b.Func.Config.Types
  1674  	// match: (Lsh16x16 <t> x y)
  1675  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1676  	for {
  1677  		t := v.Type
  1678  		x := v_0
  1679  		y := v_1
  1680  		v.reset(OpMIPSCMOVZ)
  1681  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1682  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1683  		v1.AddArg(y)
  1684  		v0.AddArg2(x, v1)
  1685  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1686  		v2.AuxInt = int32ToAuxInt(0)
  1687  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1688  		v3.AuxInt = int32ToAuxInt(32)
  1689  		v3.AddArg(v1)
  1690  		v.AddArg3(v0, v2, v3)
  1691  		return true
  1692  	}
  1693  }
  1694  func rewriteValueMIPS_OpLsh16x32(v *Value) bool {
  1695  	v_1 := v.Args[1]
  1696  	v_0 := v.Args[0]
  1697  	b := v.Block
  1698  	typ := &b.Func.Config.Types
  1699  	// match: (Lsh16x32 <t> x y)
  1700  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1701  	for {
  1702  		t := v.Type
  1703  		x := v_0
  1704  		y := v_1
  1705  		v.reset(OpMIPSCMOVZ)
  1706  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1707  		v0.AddArg2(x, y)
  1708  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1709  		v1.AuxInt = int32ToAuxInt(0)
  1710  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1711  		v2.AuxInt = int32ToAuxInt(32)
  1712  		v2.AddArg(y)
  1713  		v.AddArg3(v0, v1, v2)
  1714  		return true
  1715  	}
  1716  }
  1717  func rewriteValueMIPS_OpLsh16x64(v *Value) bool {
  1718  	v_1 := v.Args[1]
  1719  	v_0 := v.Args[0]
  1720  	// match: (Lsh16x64 x (Const64 [c]))
  1721  	// cond: uint32(c) < 16
  1722  	// result: (SLLconst x [int32(c)])
  1723  	for {
  1724  		x := v_0
  1725  		if v_1.Op != OpConst64 {
  1726  			break
  1727  		}
  1728  		c := auxIntToInt64(v_1.AuxInt)
  1729  		if !(uint32(c) < 16) {
  1730  			break
  1731  		}
  1732  		v.reset(OpMIPSSLLconst)
  1733  		v.AuxInt = int32ToAuxInt(int32(c))
  1734  		v.AddArg(x)
  1735  		return true
  1736  	}
  1737  	// match: (Lsh16x64 _ (Const64 [c]))
  1738  	// cond: uint32(c) >= 16
  1739  	// result: (MOVWconst [0])
  1740  	for {
  1741  		if v_1.Op != OpConst64 {
  1742  			break
  1743  		}
  1744  		c := auxIntToInt64(v_1.AuxInt)
  1745  		if !(uint32(c) >= 16) {
  1746  			break
  1747  		}
  1748  		v.reset(OpMIPSMOVWconst)
  1749  		v.AuxInt = int32ToAuxInt(0)
  1750  		return true
  1751  	}
  1752  	return false
  1753  }
  1754  func rewriteValueMIPS_OpLsh16x8(v *Value) bool {
  1755  	v_1 := v.Args[1]
  1756  	v_0 := v.Args[0]
  1757  	b := v.Block
  1758  	typ := &b.Func.Config.Types
  1759  	// match: (Lsh16x8 <t> x y)
  1760  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  1761  	for {
  1762  		t := v.Type
  1763  		x := v_0
  1764  		y := v_1
  1765  		v.reset(OpMIPSCMOVZ)
  1766  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1767  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1768  		v1.AddArg(y)
  1769  		v0.AddArg2(x, v1)
  1770  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1771  		v2.AuxInt = int32ToAuxInt(0)
  1772  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1773  		v3.AuxInt = int32ToAuxInt(32)
  1774  		v3.AddArg(v1)
  1775  		v.AddArg3(v0, v2, v3)
  1776  		return true
  1777  	}
  1778  }
  1779  func rewriteValueMIPS_OpLsh32x16(v *Value) bool {
  1780  	v_1 := v.Args[1]
  1781  	v_0 := v.Args[0]
  1782  	b := v.Block
  1783  	typ := &b.Func.Config.Types
  1784  	// match: (Lsh32x16 <t> x y)
  1785  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1786  	for {
  1787  		t := v.Type
  1788  		x := v_0
  1789  		y := v_1
  1790  		v.reset(OpMIPSCMOVZ)
  1791  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1792  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1793  		v1.AddArg(y)
  1794  		v0.AddArg2(x, v1)
  1795  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1796  		v2.AuxInt = int32ToAuxInt(0)
  1797  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1798  		v3.AuxInt = int32ToAuxInt(32)
  1799  		v3.AddArg(v1)
  1800  		v.AddArg3(v0, v2, v3)
  1801  		return true
  1802  	}
  1803  }
  1804  func rewriteValueMIPS_OpLsh32x32(v *Value) bool {
  1805  	v_1 := v.Args[1]
  1806  	v_0 := v.Args[0]
  1807  	b := v.Block
  1808  	typ := &b.Func.Config.Types
  1809  	// match: (Lsh32x32 <t> x y)
  1810  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1811  	for {
  1812  		t := v.Type
  1813  		x := v_0
  1814  		y := v_1
  1815  		v.reset(OpMIPSCMOVZ)
  1816  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1817  		v0.AddArg2(x, y)
  1818  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1819  		v1.AuxInt = int32ToAuxInt(0)
  1820  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1821  		v2.AuxInt = int32ToAuxInt(32)
  1822  		v2.AddArg(y)
  1823  		v.AddArg3(v0, v1, v2)
  1824  		return true
  1825  	}
  1826  }
  1827  func rewriteValueMIPS_OpLsh32x64(v *Value) bool {
  1828  	v_1 := v.Args[1]
  1829  	v_0 := v.Args[0]
  1830  	// match: (Lsh32x64 x (Const64 [c]))
  1831  	// cond: uint32(c) < 32
  1832  	// result: (SLLconst x [int32(c)])
  1833  	for {
  1834  		x := v_0
  1835  		if v_1.Op != OpConst64 {
  1836  			break
  1837  		}
  1838  		c := auxIntToInt64(v_1.AuxInt)
  1839  		if !(uint32(c) < 32) {
  1840  			break
  1841  		}
  1842  		v.reset(OpMIPSSLLconst)
  1843  		v.AuxInt = int32ToAuxInt(int32(c))
  1844  		v.AddArg(x)
  1845  		return true
  1846  	}
  1847  	// match: (Lsh32x64 _ (Const64 [c]))
  1848  	// cond: uint32(c) >= 32
  1849  	// result: (MOVWconst [0])
  1850  	for {
  1851  		if v_1.Op != OpConst64 {
  1852  			break
  1853  		}
  1854  		c := auxIntToInt64(v_1.AuxInt)
  1855  		if !(uint32(c) >= 32) {
  1856  			break
  1857  		}
  1858  		v.reset(OpMIPSMOVWconst)
  1859  		v.AuxInt = int32ToAuxInt(0)
  1860  		return true
  1861  	}
  1862  	return false
  1863  }
  1864  func rewriteValueMIPS_OpLsh32x8(v *Value) bool {
  1865  	v_1 := v.Args[1]
  1866  	v_0 := v.Args[0]
  1867  	b := v.Block
  1868  	typ := &b.Func.Config.Types
  1869  	// match: (Lsh32x8 <t> x y)
  1870  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  1871  	for {
  1872  		t := v.Type
  1873  		x := v_0
  1874  		y := v_1
  1875  		v.reset(OpMIPSCMOVZ)
  1876  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1877  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1878  		v1.AddArg(y)
  1879  		v0.AddArg2(x, v1)
  1880  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1881  		v2.AuxInt = int32ToAuxInt(0)
  1882  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1883  		v3.AuxInt = int32ToAuxInt(32)
  1884  		v3.AddArg(v1)
  1885  		v.AddArg3(v0, v2, v3)
  1886  		return true
  1887  	}
  1888  }
  1889  func rewriteValueMIPS_OpLsh8x16(v *Value) bool {
  1890  	v_1 := v.Args[1]
  1891  	v_0 := v.Args[0]
  1892  	b := v.Block
  1893  	typ := &b.Func.Config.Types
  1894  	// match: (Lsh8x16 <t> x y)
  1895  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1896  	for {
  1897  		t := v.Type
  1898  		x := v_0
  1899  		y := v_1
  1900  		v.reset(OpMIPSCMOVZ)
  1901  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1902  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1903  		v1.AddArg(y)
  1904  		v0.AddArg2(x, v1)
  1905  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1906  		v2.AuxInt = int32ToAuxInt(0)
  1907  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1908  		v3.AuxInt = int32ToAuxInt(32)
  1909  		v3.AddArg(v1)
  1910  		v.AddArg3(v0, v2, v3)
  1911  		return true
  1912  	}
  1913  }
  1914  func rewriteValueMIPS_OpLsh8x32(v *Value) bool {
  1915  	v_1 := v.Args[1]
  1916  	v_0 := v.Args[0]
  1917  	b := v.Block
  1918  	typ := &b.Func.Config.Types
  1919  	// match: (Lsh8x32 <t> x y)
  1920  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1921  	for {
  1922  		t := v.Type
  1923  		x := v_0
  1924  		y := v_1
  1925  		v.reset(OpMIPSCMOVZ)
  1926  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1927  		v0.AddArg2(x, y)
  1928  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1929  		v1.AuxInt = int32ToAuxInt(0)
  1930  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1931  		v2.AuxInt = int32ToAuxInt(32)
  1932  		v2.AddArg(y)
  1933  		v.AddArg3(v0, v1, v2)
  1934  		return true
  1935  	}
  1936  }
  1937  func rewriteValueMIPS_OpLsh8x64(v *Value) bool {
  1938  	v_1 := v.Args[1]
  1939  	v_0 := v.Args[0]
  1940  	// match: (Lsh8x64 x (Const64 [c]))
  1941  	// cond: uint32(c) < 8
  1942  	// result: (SLLconst x [int32(c)])
  1943  	for {
  1944  		x := v_0
  1945  		if v_1.Op != OpConst64 {
  1946  			break
  1947  		}
  1948  		c := auxIntToInt64(v_1.AuxInt)
  1949  		if !(uint32(c) < 8) {
  1950  			break
  1951  		}
  1952  		v.reset(OpMIPSSLLconst)
  1953  		v.AuxInt = int32ToAuxInt(int32(c))
  1954  		v.AddArg(x)
  1955  		return true
  1956  	}
  1957  	// match: (Lsh8x64 _ (Const64 [c]))
  1958  	// cond: uint32(c) >= 8
  1959  	// result: (MOVWconst [0])
  1960  	for {
  1961  		if v_1.Op != OpConst64 {
  1962  			break
  1963  		}
  1964  		c := auxIntToInt64(v_1.AuxInt)
  1965  		if !(uint32(c) >= 8) {
  1966  			break
  1967  		}
  1968  		v.reset(OpMIPSMOVWconst)
  1969  		v.AuxInt = int32ToAuxInt(0)
  1970  		return true
  1971  	}
  1972  	return false
  1973  }
  1974  func rewriteValueMIPS_OpLsh8x8(v *Value) bool {
  1975  	v_1 := v.Args[1]
  1976  	v_0 := v.Args[0]
  1977  	b := v.Block
  1978  	typ := &b.Func.Config.Types
  1979  	// match: (Lsh8x8 <t> x y)
  1980  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  1981  	for {
  1982  		t := v.Type
  1983  		x := v_0
  1984  		y := v_1
  1985  		v.reset(OpMIPSCMOVZ)
  1986  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1987  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1988  		v1.AddArg(y)
  1989  		v0.AddArg2(x, v1)
  1990  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1991  		v2.AuxInt = int32ToAuxInt(0)
  1992  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1993  		v3.AuxInt = int32ToAuxInt(32)
  1994  		v3.AddArg(v1)
  1995  		v.AddArg3(v0, v2, v3)
  1996  		return true
  1997  	}
  1998  }
  1999  func rewriteValueMIPS_OpMIPSADD(v *Value) bool {
  2000  	v_1 := v.Args[1]
  2001  	v_0 := v.Args[0]
  2002  	// match: (ADD x (MOVWconst [c]))
  2003  	// result: (ADDconst [c] x)
  2004  	for {
  2005  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2006  			x := v_0
  2007  			if v_1.Op != OpMIPSMOVWconst {
  2008  				continue
  2009  			}
  2010  			c := auxIntToInt32(v_1.AuxInt)
  2011  			v.reset(OpMIPSADDconst)
  2012  			v.AuxInt = int32ToAuxInt(c)
  2013  			v.AddArg(x)
  2014  			return true
  2015  		}
  2016  		break
  2017  	}
  2018  	// match: (ADD x (NEG y))
  2019  	// result: (SUB x y)
  2020  	for {
  2021  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2022  			x := v_0
  2023  			if v_1.Op != OpMIPSNEG {
  2024  				continue
  2025  			}
  2026  			y := v_1.Args[0]
  2027  			v.reset(OpMIPSSUB)
  2028  			v.AddArg2(x, y)
  2029  			return true
  2030  		}
  2031  		break
  2032  	}
  2033  	return false
  2034  }
  2035  func rewriteValueMIPS_OpMIPSADDconst(v *Value) bool {
  2036  	v_0 := v.Args[0]
  2037  	// match: (ADDconst [off1] (MOVWaddr [off2] {sym} ptr))
  2038  	// result: (MOVWaddr [off1+off2] {sym} ptr)
  2039  	for {
  2040  		off1 := auxIntToInt32(v.AuxInt)
  2041  		if v_0.Op != OpMIPSMOVWaddr {
  2042  			break
  2043  		}
  2044  		off2 := auxIntToInt32(v_0.AuxInt)
  2045  		sym := auxToSym(v_0.Aux)
  2046  		ptr := v_0.Args[0]
  2047  		v.reset(OpMIPSMOVWaddr)
  2048  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2049  		v.Aux = symToAux(sym)
  2050  		v.AddArg(ptr)
  2051  		return true
  2052  	}
  2053  	// match: (ADDconst [0] x)
  2054  	// result: x
  2055  	for {
  2056  		if auxIntToInt32(v.AuxInt) != 0 {
  2057  			break
  2058  		}
  2059  		x := v_0
  2060  		v.copyOf(x)
  2061  		return true
  2062  	}
  2063  	// match: (ADDconst [c] (MOVWconst [d]))
  2064  	// result: (MOVWconst [int32(c+d)])
  2065  	for {
  2066  		c := auxIntToInt32(v.AuxInt)
  2067  		if v_0.Op != OpMIPSMOVWconst {
  2068  			break
  2069  		}
  2070  		d := auxIntToInt32(v_0.AuxInt)
  2071  		v.reset(OpMIPSMOVWconst)
  2072  		v.AuxInt = int32ToAuxInt(int32(c + d))
  2073  		return true
  2074  	}
  2075  	// match: (ADDconst [c] (ADDconst [d] x))
  2076  	// result: (ADDconst [c+d] x)
  2077  	for {
  2078  		c := auxIntToInt32(v.AuxInt)
  2079  		if v_0.Op != OpMIPSADDconst {
  2080  			break
  2081  		}
  2082  		d := auxIntToInt32(v_0.AuxInt)
  2083  		x := v_0.Args[0]
  2084  		v.reset(OpMIPSADDconst)
  2085  		v.AuxInt = int32ToAuxInt(c + d)
  2086  		v.AddArg(x)
  2087  		return true
  2088  	}
  2089  	// match: (ADDconst [c] (SUBconst [d] x))
  2090  	// result: (ADDconst [c-d] x)
  2091  	for {
  2092  		c := auxIntToInt32(v.AuxInt)
  2093  		if v_0.Op != OpMIPSSUBconst {
  2094  			break
  2095  		}
  2096  		d := auxIntToInt32(v_0.AuxInt)
  2097  		x := v_0.Args[0]
  2098  		v.reset(OpMIPSADDconst)
  2099  		v.AuxInt = int32ToAuxInt(c - d)
  2100  		v.AddArg(x)
  2101  		return true
  2102  	}
  2103  	return false
  2104  }
  2105  func rewriteValueMIPS_OpMIPSAND(v *Value) bool {
  2106  	v_1 := v.Args[1]
  2107  	v_0 := v.Args[0]
  2108  	b := v.Block
  2109  	// match: (AND x (MOVWconst [c]))
  2110  	// result: (ANDconst [c] x)
  2111  	for {
  2112  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2113  			x := v_0
  2114  			if v_1.Op != OpMIPSMOVWconst {
  2115  				continue
  2116  			}
  2117  			c := auxIntToInt32(v_1.AuxInt)
  2118  			v.reset(OpMIPSANDconst)
  2119  			v.AuxInt = int32ToAuxInt(c)
  2120  			v.AddArg(x)
  2121  			return true
  2122  		}
  2123  		break
  2124  	}
  2125  	// match: (AND x x)
  2126  	// result: x
  2127  	for {
  2128  		x := v_0
  2129  		if x != v_1 {
  2130  			break
  2131  		}
  2132  		v.copyOf(x)
  2133  		return true
  2134  	}
  2135  	// match: (AND (SGTUconst [1] x) (SGTUconst [1] y))
  2136  	// result: (SGTUconst [1] (OR <x.Type> x y))
  2137  	for {
  2138  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2139  			if v_0.Op != OpMIPSSGTUconst || auxIntToInt32(v_0.AuxInt) != 1 {
  2140  				continue
  2141  			}
  2142  			x := v_0.Args[0]
  2143  			if v_1.Op != OpMIPSSGTUconst || auxIntToInt32(v_1.AuxInt) != 1 {
  2144  				continue
  2145  			}
  2146  			y := v_1.Args[0]
  2147  			v.reset(OpMIPSSGTUconst)
  2148  			v.AuxInt = int32ToAuxInt(1)
  2149  			v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  2150  			v0.AddArg2(x, y)
  2151  			v.AddArg(v0)
  2152  			return true
  2153  		}
  2154  		break
  2155  	}
  2156  	return false
  2157  }
  2158  func rewriteValueMIPS_OpMIPSANDconst(v *Value) bool {
  2159  	v_0 := v.Args[0]
  2160  	// match: (ANDconst [0] _)
  2161  	// result: (MOVWconst [0])
  2162  	for {
  2163  		if auxIntToInt32(v.AuxInt) != 0 {
  2164  			break
  2165  		}
  2166  		v.reset(OpMIPSMOVWconst)
  2167  		v.AuxInt = int32ToAuxInt(0)
  2168  		return true
  2169  	}
  2170  	// match: (ANDconst [-1] x)
  2171  	// result: x
  2172  	for {
  2173  		if auxIntToInt32(v.AuxInt) != -1 {
  2174  			break
  2175  		}
  2176  		x := v_0
  2177  		v.copyOf(x)
  2178  		return true
  2179  	}
  2180  	// match: (ANDconst [c] (MOVWconst [d]))
  2181  	// result: (MOVWconst [c&d])
  2182  	for {
  2183  		c := auxIntToInt32(v.AuxInt)
  2184  		if v_0.Op != OpMIPSMOVWconst {
  2185  			break
  2186  		}
  2187  		d := auxIntToInt32(v_0.AuxInt)
  2188  		v.reset(OpMIPSMOVWconst)
  2189  		v.AuxInt = int32ToAuxInt(c & d)
  2190  		return true
  2191  	}
  2192  	// match: (ANDconst [c] (ANDconst [d] x))
  2193  	// result: (ANDconst [c&d] x)
  2194  	for {
  2195  		c := auxIntToInt32(v.AuxInt)
  2196  		if v_0.Op != OpMIPSANDconst {
  2197  			break
  2198  		}
  2199  		d := auxIntToInt32(v_0.AuxInt)
  2200  		x := v_0.Args[0]
  2201  		v.reset(OpMIPSANDconst)
  2202  		v.AuxInt = int32ToAuxInt(c & d)
  2203  		v.AddArg(x)
  2204  		return true
  2205  	}
  2206  	return false
  2207  }
  2208  func rewriteValueMIPS_OpMIPSCMOVZ(v *Value) bool {
  2209  	v_2 := v.Args[2]
  2210  	v_1 := v.Args[1]
  2211  	v_0 := v.Args[0]
  2212  	// match: (CMOVZ _ f (MOVWconst [0]))
  2213  	// result: f
  2214  	for {
  2215  		f := v_1
  2216  		if v_2.Op != OpMIPSMOVWconst || auxIntToInt32(v_2.AuxInt) != 0 {
  2217  			break
  2218  		}
  2219  		v.copyOf(f)
  2220  		return true
  2221  	}
  2222  	// match: (CMOVZ a _ (MOVWconst [c]))
  2223  	// cond: c!=0
  2224  	// result: a
  2225  	for {
  2226  		a := v_0
  2227  		if v_2.Op != OpMIPSMOVWconst {
  2228  			break
  2229  		}
  2230  		c := auxIntToInt32(v_2.AuxInt)
  2231  		if !(c != 0) {
  2232  			break
  2233  		}
  2234  		v.copyOf(a)
  2235  		return true
  2236  	}
  2237  	// match: (CMOVZ a (MOVWconst [0]) c)
  2238  	// result: (CMOVZzero a c)
  2239  	for {
  2240  		a := v_0
  2241  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2242  			break
  2243  		}
  2244  		c := v_2
  2245  		v.reset(OpMIPSCMOVZzero)
  2246  		v.AddArg2(a, c)
  2247  		return true
  2248  	}
  2249  	return false
  2250  }
  2251  func rewriteValueMIPS_OpMIPSCMOVZzero(v *Value) bool {
  2252  	v_1 := v.Args[1]
  2253  	v_0 := v.Args[0]
  2254  	// match: (CMOVZzero _ (MOVWconst [0]))
  2255  	// result: (MOVWconst [0])
  2256  	for {
  2257  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2258  			break
  2259  		}
  2260  		v.reset(OpMIPSMOVWconst)
  2261  		v.AuxInt = int32ToAuxInt(0)
  2262  		return true
  2263  	}
  2264  	// match: (CMOVZzero a (MOVWconst [c]))
  2265  	// cond: c!=0
  2266  	// result: a
  2267  	for {
  2268  		a := v_0
  2269  		if v_1.Op != OpMIPSMOVWconst {
  2270  			break
  2271  		}
  2272  		c := auxIntToInt32(v_1.AuxInt)
  2273  		if !(c != 0) {
  2274  			break
  2275  		}
  2276  		v.copyOf(a)
  2277  		return true
  2278  	}
  2279  	return false
  2280  }
  2281  func rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v *Value) bool {
  2282  	v_2 := v.Args[2]
  2283  	v_1 := v.Args[1]
  2284  	v_0 := v.Args[0]
  2285  	// match: (LoweredAtomicAdd ptr (MOVWconst [c]) mem)
  2286  	// cond: is16Bit(int64(c))
  2287  	// result: (LoweredAtomicAddconst [c] ptr mem)
  2288  	for {
  2289  		ptr := v_0
  2290  		if v_1.Op != OpMIPSMOVWconst {
  2291  			break
  2292  		}
  2293  		c := auxIntToInt32(v_1.AuxInt)
  2294  		mem := v_2
  2295  		if !(is16Bit(int64(c))) {
  2296  			break
  2297  		}
  2298  		v.reset(OpMIPSLoweredAtomicAddconst)
  2299  		v.AuxInt = int32ToAuxInt(c)
  2300  		v.AddArg2(ptr, mem)
  2301  		return true
  2302  	}
  2303  	return false
  2304  }
  2305  func rewriteValueMIPS_OpMIPSLoweredAtomicStore32(v *Value) bool {
  2306  	v_2 := v.Args[2]
  2307  	v_1 := v.Args[1]
  2308  	v_0 := v.Args[0]
  2309  	// match: (LoweredAtomicStore32 ptr (MOVWconst [0]) mem)
  2310  	// result: (LoweredAtomicStorezero ptr mem)
  2311  	for {
  2312  		ptr := v_0
  2313  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2314  			break
  2315  		}
  2316  		mem := v_2
  2317  		v.reset(OpMIPSLoweredAtomicStorezero)
  2318  		v.AddArg2(ptr, mem)
  2319  		return true
  2320  	}
  2321  	return false
  2322  }
  2323  func rewriteValueMIPS_OpMIPSMOVBUload(v *Value) bool {
  2324  	v_1 := v.Args[1]
  2325  	v_0 := v.Args[0]
  2326  	// match: (MOVBUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2327  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2328  	// result: (MOVBUload [off1+off2] {sym} ptr mem)
  2329  	for {
  2330  		off1 := auxIntToInt32(v.AuxInt)
  2331  		sym := auxToSym(v.Aux)
  2332  		x := v_0
  2333  		if x.Op != OpMIPSADDconst {
  2334  			break
  2335  		}
  2336  		off2 := auxIntToInt32(x.AuxInt)
  2337  		ptr := x.Args[0]
  2338  		mem := v_1
  2339  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2340  			break
  2341  		}
  2342  		v.reset(OpMIPSMOVBUload)
  2343  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2344  		v.Aux = symToAux(sym)
  2345  		v.AddArg2(ptr, mem)
  2346  		return true
  2347  	}
  2348  	// match: (MOVBUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2349  	// cond: canMergeSym(sym1,sym2)
  2350  	// result: (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2351  	for {
  2352  		off1 := auxIntToInt32(v.AuxInt)
  2353  		sym1 := auxToSym(v.Aux)
  2354  		if v_0.Op != OpMIPSMOVWaddr {
  2355  			break
  2356  		}
  2357  		off2 := auxIntToInt32(v_0.AuxInt)
  2358  		sym2 := auxToSym(v_0.Aux)
  2359  		ptr := v_0.Args[0]
  2360  		mem := v_1
  2361  		if !(canMergeSym(sym1, sym2)) {
  2362  			break
  2363  		}
  2364  		v.reset(OpMIPSMOVBUload)
  2365  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2366  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2367  		v.AddArg2(ptr, mem)
  2368  		return true
  2369  	}
  2370  	// match: (MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  2371  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2372  	// result: (MOVBUreg x)
  2373  	for {
  2374  		off := auxIntToInt32(v.AuxInt)
  2375  		sym := auxToSym(v.Aux)
  2376  		ptr := v_0
  2377  		if v_1.Op != OpMIPSMOVBstore {
  2378  			break
  2379  		}
  2380  		off2 := auxIntToInt32(v_1.AuxInt)
  2381  		sym2 := auxToSym(v_1.Aux)
  2382  		x := v_1.Args[1]
  2383  		ptr2 := v_1.Args[0]
  2384  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2385  			break
  2386  		}
  2387  		v.reset(OpMIPSMOVBUreg)
  2388  		v.AddArg(x)
  2389  		return true
  2390  	}
  2391  	return false
  2392  }
  2393  func rewriteValueMIPS_OpMIPSMOVBUreg(v *Value) bool {
  2394  	v_0 := v.Args[0]
  2395  	b := v.Block
  2396  	// match: (MOVBUreg x:(MOVBUload _ _))
  2397  	// result: (MOVWreg x)
  2398  	for {
  2399  		x := v_0
  2400  		if x.Op != OpMIPSMOVBUload {
  2401  			break
  2402  		}
  2403  		v.reset(OpMIPSMOVWreg)
  2404  		v.AddArg(x)
  2405  		return true
  2406  	}
  2407  	// match: (MOVBUreg x:(MOVBUreg _))
  2408  	// result: (MOVWreg x)
  2409  	for {
  2410  		x := v_0
  2411  		if x.Op != OpMIPSMOVBUreg {
  2412  			break
  2413  		}
  2414  		v.reset(OpMIPSMOVWreg)
  2415  		v.AddArg(x)
  2416  		return true
  2417  	}
  2418  	// match: (MOVBUreg <t> x:(MOVBload [off] {sym} ptr mem))
  2419  	// cond: x.Uses == 1 && clobber(x)
  2420  	// result: @x.Block (MOVBUload <t> [off] {sym} ptr mem)
  2421  	for {
  2422  		t := v.Type
  2423  		x := v_0
  2424  		if x.Op != OpMIPSMOVBload {
  2425  			break
  2426  		}
  2427  		off := auxIntToInt32(x.AuxInt)
  2428  		sym := auxToSym(x.Aux)
  2429  		mem := x.Args[1]
  2430  		ptr := x.Args[0]
  2431  		if !(x.Uses == 1 && clobber(x)) {
  2432  			break
  2433  		}
  2434  		b = x.Block
  2435  		v0 := b.NewValue0(x.Pos, OpMIPSMOVBUload, t)
  2436  		v.copyOf(v0)
  2437  		v0.AuxInt = int32ToAuxInt(off)
  2438  		v0.Aux = symToAux(sym)
  2439  		v0.AddArg2(ptr, mem)
  2440  		return true
  2441  	}
  2442  	// match: (MOVBUreg (ANDconst [c] x))
  2443  	// result: (ANDconst [c&0xff] x)
  2444  	for {
  2445  		if v_0.Op != OpMIPSANDconst {
  2446  			break
  2447  		}
  2448  		c := auxIntToInt32(v_0.AuxInt)
  2449  		x := v_0.Args[0]
  2450  		v.reset(OpMIPSANDconst)
  2451  		v.AuxInt = int32ToAuxInt(c & 0xff)
  2452  		v.AddArg(x)
  2453  		return true
  2454  	}
  2455  	// match: (MOVBUreg (MOVWconst [c]))
  2456  	// result: (MOVWconst [int32(uint8(c))])
  2457  	for {
  2458  		if v_0.Op != OpMIPSMOVWconst {
  2459  			break
  2460  		}
  2461  		c := auxIntToInt32(v_0.AuxInt)
  2462  		v.reset(OpMIPSMOVWconst)
  2463  		v.AuxInt = int32ToAuxInt(int32(uint8(c)))
  2464  		return true
  2465  	}
  2466  	return false
  2467  }
  2468  func rewriteValueMIPS_OpMIPSMOVBload(v *Value) bool {
  2469  	v_1 := v.Args[1]
  2470  	v_0 := v.Args[0]
  2471  	// match: (MOVBload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2472  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2473  	// result: (MOVBload [off1+off2] {sym} ptr mem)
  2474  	for {
  2475  		off1 := auxIntToInt32(v.AuxInt)
  2476  		sym := auxToSym(v.Aux)
  2477  		x := v_0
  2478  		if x.Op != OpMIPSADDconst {
  2479  			break
  2480  		}
  2481  		off2 := auxIntToInt32(x.AuxInt)
  2482  		ptr := x.Args[0]
  2483  		mem := v_1
  2484  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2485  			break
  2486  		}
  2487  		v.reset(OpMIPSMOVBload)
  2488  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2489  		v.Aux = symToAux(sym)
  2490  		v.AddArg2(ptr, mem)
  2491  		return true
  2492  	}
  2493  	// match: (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2494  	// cond: canMergeSym(sym1,sym2)
  2495  	// result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2496  	for {
  2497  		off1 := auxIntToInt32(v.AuxInt)
  2498  		sym1 := auxToSym(v.Aux)
  2499  		if v_0.Op != OpMIPSMOVWaddr {
  2500  			break
  2501  		}
  2502  		off2 := auxIntToInt32(v_0.AuxInt)
  2503  		sym2 := auxToSym(v_0.Aux)
  2504  		ptr := v_0.Args[0]
  2505  		mem := v_1
  2506  		if !(canMergeSym(sym1, sym2)) {
  2507  			break
  2508  		}
  2509  		v.reset(OpMIPSMOVBload)
  2510  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2511  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2512  		v.AddArg2(ptr, mem)
  2513  		return true
  2514  	}
  2515  	// match: (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  2516  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2517  	// result: (MOVBreg x)
  2518  	for {
  2519  		off := auxIntToInt32(v.AuxInt)
  2520  		sym := auxToSym(v.Aux)
  2521  		ptr := v_0
  2522  		if v_1.Op != OpMIPSMOVBstore {
  2523  			break
  2524  		}
  2525  		off2 := auxIntToInt32(v_1.AuxInt)
  2526  		sym2 := auxToSym(v_1.Aux)
  2527  		x := v_1.Args[1]
  2528  		ptr2 := v_1.Args[0]
  2529  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2530  			break
  2531  		}
  2532  		v.reset(OpMIPSMOVBreg)
  2533  		v.AddArg(x)
  2534  		return true
  2535  	}
  2536  	return false
  2537  }
  2538  func rewriteValueMIPS_OpMIPSMOVBreg(v *Value) bool {
  2539  	v_0 := v.Args[0]
  2540  	b := v.Block
  2541  	// match: (MOVBreg x:(MOVBload _ _))
  2542  	// result: (MOVWreg x)
  2543  	for {
  2544  		x := v_0
  2545  		if x.Op != OpMIPSMOVBload {
  2546  			break
  2547  		}
  2548  		v.reset(OpMIPSMOVWreg)
  2549  		v.AddArg(x)
  2550  		return true
  2551  	}
  2552  	// match: (MOVBreg x:(MOVBreg _))
  2553  	// result: (MOVWreg x)
  2554  	for {
  2555  		x := v_0
  2556  		if x.Op != OpMIPSMOVBreg {
  2557  			break
  2558  		}
  2559  		v.reset(OpMIPSMOVWreg)
  2560  		v.AddArg(x)
  2561  		return true
  2562  	}
  2563  	// match: (MOVBreg <t> x:(MOVBUload [off] {sym} ptr mem))
  2564  	// cond: x.Uses == 1 && clobber(x)
  2565  	// result: @x.Block (MOVBload <t> [off] {sym} ptr mem)
  2566  	for {
  2567  		t := v.Type
  2568  		x := v_0
  2569  		if x.Op != OpMIPSMOVBUload {
  2570  			break
  2571  		}
  2572  		off := auxIntToInt32(x.AuxInt)
  2573  		sym := auxToSym(x.Aux)
  2574  		mem := x.Args[1]
  2575  		ptr := x.Args[0]
  2576  		if !(x.Uses == 1 && clobber(x)) {
  2577  			break
  2578  		}
  2579  		b = x.Block
  2580  		v0 := b.NewValue0(x.Pos, OpMIPSMOVBload, t)
  2581  		v.copyOf(v0)
  2582  		v0.AuxInt = int32ToAuxInt(off)
  2583  		v0.Aux = symToAux(sym)
  2584  		v0.AddArg2(ptr, mem)
  2585  		return true
  2586  	}
  2587  	// match: (MOVBreg (ANDconst [c] x))
  2588  	// cond: c & 0x80 == 0
  2589  	// result: (ANDconst [c&0x7f] x)
  2590  	for {
  2591  		if v_0.Op != OpMIPSANDconst {
  2592  			break
  2593  		}
  2594  		c := auxIntToInt32(v_0.AuxInt)
  2595  		x := v_0.Args[0]
  2596  		if !(c&0x80 == 0) {
  2597  			break
  2598  		}
  2599  		v.reset(OpMIPSANDconst)
  2600  		v.AuxInt = int32ToAuxInt(c & 0x7f)
  2601  		v.AddArg(x)
  2602  		return true
  2603  	}
  2604  	// match: (MOVBreg (MOVWconst [c]))
  2605  	// result: (MOVWconst [int32(int8(c))])
  2606  	for {
  2607  		if v_0.Op != OpMIPSMOVWconst {
  2608  			break
  2609  		}
  2610  		c := auxIntToInt32(v_0.AuxInt)
  2611  		v.reset(OpMIPSMOVWconst)
  2612  		v.AuxInt = int32ToAuxInt(int32(int8(c)))
  2613  		return true
  2614  	}
  2615  	return false
  2616  }
  2617  func rewriteValueMIPS_OpMIPSMOVBstore(v *Value) bool {
  2618  	v_2 := v.Args[2]
  2619  	v_1 := v.Args[1]
  2620  	v_0 := v.Args[0]
  2621  	// match: (MOVBstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  2622  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2623  	// result: (MOVBstore [off1+off2] {sym} ptr val mem)
  2624  	for {
  2625  		off1 := auxIntToInt32(v.AuxInt)
  2626  		sym := auxToSym(v.Aux)
  2627  		x := v_0
  2628  		if x.Op != OpMIPSADDconst {
  2629  			break
  2630  		}
  2631  		off2 := auxIntToInt32(x.AuxInt)
  2632  		ptr := x.Args[0]
  2633  		val := v_1
  2634  		mem := v_2
  2635  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2636  			break
  2637  		}
  2638  		v.reset(OpMIPSMOVBstore)
  2639  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2640  		v.Aux = symToAux(sym)
  2641  		v.AddArg3(ptr, val, mem)
  2642  		return true
  2643  	}
  2644  	// match: (MOVBstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  2645  	// cond: canMergeSym(sym1,sym2)
  2646  	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  2647  	for {
  2648  		off1 := auxIntToInt32(v.AuxInt)
  2649  		sym1 := auxToSym(v.Aux)
  2650  		if v_0.Op != OpMIPSMOVWaddr {
  2651  			break
  2652  		}
  2653  		off2 := auxIntToInt32(v_0.AuxInt)
  2654  		sym2 := auxToSym(v_0.Aux)
  2655  		ptr := v_0.Args[0]
  2656  		val := v_1
  2657  		mem := v_2
  2658  		if !(canMergeSym(sym1, sym2)) {
  2659  			break
  2660  		}
  2661  		v.reset(OpMIPSMOVBstore)
  2662  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2663  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2664  		v.AddArg3(ptr, val, mem)
  2665  		return true
  2666  	}
  2667  	// match: (MOVBstore [off] {sym} ptr (MOVWconst [0]) mem)
  2668  	// result: (MOVBstorezero [off] {sym} ptr mem)
  2669  	for {
  2670  		off := auxIntToInt32(v.AuxInt)
  2671  		sym := auxToSym(v.Aux)
  2672  		ptr := v_0
  2673  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2674  			break
  2675  		}
  2676  		mem := v_2
  2677  		v.reset(OpMIPSMOVBstorezero)
  2678  		v.AuxInt = int32ToAuxInt(off)
  2679  		v.Aux = symToAux(sym)
  2680  		v.AddArg2(ptr, mem)
  2681  		return true
  2682  	}
  2683  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  2684  	// result: (MOVBstore [off] {sym} ptr x mem)
  2685  	for {
  2686  		off := auxIntToInt32(v.AuxInt)
  2687  		sym := auxToSym(v.Aux)
  2688  		ptr := v_0
  2689  		if v_1.Op != OpMIPSMOVBreg {
  2690  			break
  2691  		}
  2692  		x := v_1.Args[0]
  2693  		mem := v_2
  2694  		v.reset(OpMIPSMOVBstore)
  2695  		v.AuxInt = int32ToAuxInt(off)
  2696  		v.Aux = symToAux(sym)
  2697  		v.AddArg3(ptr, x, mem)
  2698  		return true
  2699  	}
  2700  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
  2701  	// result: (MOVBstore [off] {sym} ptr x mem)
  2702  	for {
  2703  		off := auxIntToInt32(v.AuxInt)
  2704  		sym := auxToSym(v.Aux)
  2705  		ptr := v_0
  2706  		if v_1.Op != OpMIPSMOVBUreg {
  2707  			break
  2708  		}
  2709  		x := v_1.Args[0]
  2710  		mem := v_2
  2711  		v.reset(OpMIPSMOVBstore)
  2712  		v.AuxInt = int32ToAuxInt(off)
  2713  		v.Aux = symToAux(sym)
  2714  		v.AddArg3(ptr, x, mem)
  2715  		return true
  2716  	}
  2717  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  2718  	// result: (MOVBstore [off] {sym} ptr x mem)
  2719  	for {
  2720  		off := auxIntToInt32(v.AuxInt)
  2721  		sym := auxToSym(v.Aux)
  2722  		ptr := v_0
  2723  		if v_1.Op != OpMIPSMOVHreg {
  2724  			break
  2725  		}
  2726  		x := v_1.Args[0]
  2727  		mem := v_2
  2728  		v.reset(OpMIPSMOVBstore)
  2729  		v.AuxInt = int32ToAuxInt(off)
  2730  		v.Aux = symToAux(sym)
  2731  		v.AddArg3(ptr, x, mem)
  2732  		return true
  2733  	}
  2734  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
  2735  	// result: (MOVBstore [off] {sym} ptr x mem)
  2736  	for {
  2737  		off := auxIntToInt32(v.AuxInt)
  2738  		sym := auxToSym(v.Aux)
  2739  		ptr := v_0
  2740  		if v_1.Op != OpMIPSMOVHUreg {
  2741  			break
  2742  		}
  2743  		x := v_1.Args[0]
  2744  		mem := v_2
  2745  		v.reset(OpMIPSMOVBstore)
  2746  		v.AuxInt = int32ToAuxInt(off)
  2747  		v.Aux = symToAux(sym)
  2748  		v.AddArg3(ptr, x, mem)
  2749  		return true
  2750  	}
  2751  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  2752  	// result: (MOVBstore [off] {sym} ptr x mem)
  2753  	for {
  2754  		off := auxIntToInt32(v.AuxInt)
  2755  		sym := auxToSym(v.Aux)
  2756  		ptr := v_0
  2757  		if v_1.Op != OpMIPSMOVWreg {
  2758  			break
  2759  		}
  2760  		x := v_1.Args[0]
  2761  		mem := v_2
  2762  		v.reset(OpMIPSMOVBstore)
  2763  		v.AuxInt = int32ToAuxInt(off)
  2764  		v.Aux = symToAux(sym)
  2765  		v.AddArg3(ptr, x, mem)
  2766  		return true
  2767  	}
  2768  	return false
  2769  }
  2770  func rewriteValueMIPS_OpMIPSMOVBstorezero(v *Value) bool {
  2771  	v_1 := v.Args[1]
  2772  	v_0 := v.Args[0]
  2773  	// match: (MOVBstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2774  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2775  	// result: (MOVBstorezero [off1+off2] {sym} ptr mem)
  2776  	for {
  2777  		off1 := auxIntToInt32(v.AuxInt)
  2778  		sym := auxToSym(v.Aux)
  2779  		x := v_0
  2780  		if x.Op != OpMIPSADDconst {
  2781  			break
  2782  		}
  2783  		off2 := auxIntToInt32(x.AuxInt)
  2784  		ptr := x.Args[0]
  2785  		mem := v_1
  2786  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2787  			break
  2788  		}
  2789  		v.reset(OpMIPSMOVBstorezero)
  2790  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2791  		v.Aux = symToAux(sym)
  2792  		v.AddArg2(ptr, mem)
  2793  		return true
  2794  	}
  2795  	// match: (MOVBstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2796  	// cond: canMergeSym(sym1,sym2)
  2797  	// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2798  	for {
  2799  		off1 := auxIntToInt32(v.AuxInt)
  2800  		sym1 := auxToSym(v.Aux)
  2801  		if v_0.Op != OpMIPSMOVWaddr {
  2802  			break
  2803  		}
  2804  		off2 := auxIntToInt32(v_0.AuxInt)
  2805  		sym2 := auxToSym(v_0.Aux)
  2806  		ptr := v_0.Args[0]
  2807  		mem := v_1
  2808  		if !(canMergeSym(sym1, sym2)) {
  2809  			break
  2810  		}
  2811  		v.reset(OpMIPSMOVBstorezero)
  2812  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2813  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2814  		v.AddArg2(ptr, mem)
  2815  		return true
  2816  	}
  2817  	return false
  2818  }
  2819  func rewriteValueMIPS_OpMIPSMOVDload(v *Value) bool {
  2820  	v_1 := v.Args[1]
  2821  	v_0 := v.Args[0]
  2822  	// match: (MOVDload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2823  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2824  	// result: (MOVDload [off1+off2] {sym} ptr mem)
  2825  	for {
  2826  		off1 := auxIntToInt32(v.AuxInt)
  2827  		sym := auxToSym(v.Aux)
  2828  		x := v_0
  2829  		if x.Op != OpMIPSADDconst {
  2830  			break
  2831  		}
  2832  		off2 := auxIntToInt32(x.AuxInt)
  2833  		ptr := x.Args[0]
  2834  		mem := v_1
  2835  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2836  			break
  2837  		}
  2838  		v.reset(OpMIPSMOVDload)
  2839  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2840  		v.Aux = symToAux(sym)
  2841  		v.AddArg2(ptr, mem)
  2842  		return true
  2843  	}
  2844  	// match: (MOVDload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2845  	// cond: canMergeSym(sym1,sym2)
  2846  	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2847  	for {
  2848  		off1 := auxIntToInt32(v.AuxInt)
  2849  		sym1 := auxToSym(v.Aux)
  2850  		if v_0.Op != OpMIPSMOVWaddr {
  2851  			break
  2852  		}
  2853  		off2 := auxIntToInt32(v_0.AuxInt)
  2854  		sym2 := auxToSym(v_0.Aux)
  2855  		ptr := v_0.Args[0]
  2856  		mem := v_1
  2857  		if !(canMergeSym(sym1, sym2)) {
  2858  			break
  2859  		}
  2860  		v.reset(OpMIPSMOVDload)
  2861  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2862  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2863  		v.AddArg2(ptr, mem)
  2864  		return true
  2865  	}
  2866  	// match: (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _))
  2867  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2868  	// result: x
  2869  	for {
  2870  		off := auxIntToInt32(v.AuxInt)
  2871  		sym := auxToSym(v.Aux)
  2872  		ptr := v_0
  2873  		if v_1.Op != OpMIPSMOVDstore {
  2874  			break
  2875  		}
  2876  		off2 := auxIntToInt32(v_1.AuxInt)
  2877  		sym2 := auxToSym(v_1.Aux)
  2878  		x := v_1.Args[1]
  2879  		ptr2 := v_1.Args[0]
  2880  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2881  			break
  2882  		}
  2883  		v.copyOf(x)
  2884  		return true
  2885  	}
  2886  	return false
  2887  }
  2888  func rewriteValueMIPS_OpMIPSMOVDstore(v *Value) bool {
  2889  	v_2 := v.Args[2]
  2890  	v_1 := v.Args[1]
  2891  	v_0 := v.Args[0]
  2892  	// match: (MOVDstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  2893  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2894  	// result: (MOVDstore [off1+off2] {sym} ptr val mem)
  2895  	for {
  2896  		off1 := auxIntToInt32(v.AuxInt)
  2897  		sym := auxToSym(v.Aux)
  2898  		x := v_0
  2899  		if x.Op != OpMIPSADDconst {
  2900  			break
  2901  		}
  2902  		off2 := auxIntToInt32(x.AuxInt)
  2903  		ptr := x.Args[0]
  2904  		val := v_1
  2905  		mem := v_2
  2906  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2907  			break
  2908  		}
  2909  		v.reset(OpMIPSMOVDstore)
  2910  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2911  		v.Aux = symToAux(sym)
  2912  		v.AddArg3(ptr, val, mem)
  2913  		return true
  2914  	}
  2915  	// match: (MOVDstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  2916  	// cond: canMergeSym(sym1,sym2)
  2917  	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  2918  	for {
  2919  		off1 := auxIntToInt32(v.AuxInt)
  2920  		sym1 := auxToSym(v.Aux)
  2921  		if v_0.Op != OpMIPSMOVWaddr {
  2922  			break
  2923  		}
  2924  		off2 := auxIntToInt32(v_0.AuxInt)
  2925  		sym2 := auxToSym(v_0.Aux)
  2926  		ptr := v_0.Args[0]
  2927  		val := v_1
  2928  		mem := v_2
  2929  		if !(canMergeSym(sym1, sym2)) {
  2930  			break
  2931  		}
  2932  		v.reset(OpMIPSMOVDstore)
  2933  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2934  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2935  		v.AddArg3(ptr, val, mem)
  2936  		return true
  2937  	}
  2938  	return false
  2939  }
  2940  func rewriteValueMIPS_OpMIPSMOVFload(v *Value) bool {
  2941  	v_1 := v.Args[1]
  2942  	v_0 := v.Args[0]
  2943  	// match: (MOVFload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2944  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2945  	// result: (MOVFload [off1+off2] {sym} ptr mem)
  2946  	for {
  2947  		off1 := auxIntToInt32(v.AuxInt)
  2948  		sym := auxToSym(v.Aux)
  2949  		x := v_0
  2950  		if x.Op != OpMIPSADDconst {
  2951  			break
  2952  		}
  2953  		off2 := auxIntToInt32(x.AuxInt)
  2954  		ptr := x.Args[0]
  2955  		mem := v_1
  2956  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2957  			break
  2958  		}
  2959  		v.reset(OpMIPSMOVFload)
  2960  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2961  		v.Aux = symToAux(sym)
  2962  		v.AddArg2(ptr, mem)
  2963  		return true
  2964  	}
  2965  	// match: (MOVFload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2966  	// cond: canMergeSym(sym1,sym2)
  2967  	// result: (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2968  	for {
  2969  		off1 := auxIntToInt32(v.AuxInt)
  2970  		sym1 := auxToSym(v.Aux)
  2971  		if v_0.Op != OpMIPSMOVWaddr {
  2972  			break
  2973  		}
  2974  		off2 := auxIntToInt32(v_0.AuxInt)
  2975  		sym2 := auxToSym(v_0.Aux)
  2976  		ptr := v_0.Args[0]
  2977  		mem := v_1
  2978  		if !(canMergeSym(sym1, sym2)) {
  2979  			break
  2980  		}
  2981  		v.reset(OpMIPSMOVFload)
  2982  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2983  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2984  		v.AddArg2(ptr, mem)
  2985  		return true
  2986  	}
  2987  	// match: (MOVFload [off] {sym} ptr (MOVFstore [off2] {sym2} ptr2 x _))
  2988  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2989  	// result: x
  2990  	for {
  2991  		off := auxIntToInt32(v.AuxInt)
  2992  		sym := auxToSym(v.Aux)
  2993  		ptr := v_0
  2994  		if v_1.Op != OpMIPSMOVFstore {
  2995  			break
  2996  		}
  2997  		off2 := auxIntToInt32(v_1.AuxInt)
  2998  		sym2 := auxToSym(v_1.Aux)
  2999  		x := v_1.Args[1]
  3000  		ptr2 := v_1.Args[0]
  3001  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3002  			break
  3003  		}
  3004  		v.copyOf(x)
  3005  		return true
  3006  	}
  3007  	return false
  3008  }
  3009  func rewriteValueMIPS_OpMIPSMOVFstore(v *Value) bool {
  3010  	v_2 := v.Args[2]
  3011  	v_1 := v.Args[1]
  3012  	v_0 := v.Args[0]
  3013  	// match: (MOVFstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3014  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3015  	// result: (MOVFstore [off1+off2] {sym} ptr val mem)
  3016  	for {
  3017  		off1 := auxIntToInt32(v.AuxInt)
  3018  		sym := auxToSym(v.Aux)
  3019  		x := v_0
  3020  		if x.Op != OpMIPSADDconst {
  3021  			break
  3022  		}
  3023  		off2 := auxIntToInt32(x.AuxInt)
  3024  		ptr := x.Args[0]
  3025  		val := v_1
  3026  		mem := v_2
  3027  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3028  			break
  3029  		}
  3030  		v.reset(OpMIPSMOVFstore)
  3031  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3032  		v.Aux = symToAux(sym)
  3033  		v.AddArg3(ptr, val, mem)
  3034  		return true
  3035  	}
  3036  	// match: (MOVFstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3037  	// cond: canMergeSym(sym1,sym2)
  3038  	// result: (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3039  	for {
  3040  		off1 := auxIntToInt32(v.AuxInt)
  3041  		sym1 := auxToSym(v.Aux)
  3042  		if v_0.Op != OpMIPSMOVWaddr {
  3043  			break
  3044  		}
  3045  		off2 := auxIntToInt32(v_0.AuxInt)
  3046  		sym2 := auxToSym(v_0.Aux)
  3047  		ptr := v_0.Args[0]
  3048  		val := v_1
  3049  		mem := v_2
  3050  		if !(canMergeSym(sym1, sym2)) {
  3051  			break
  3052  		}
  3053  		v.reset(OpMIPSMOVFstore)
  3054  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3055  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3056  		v.AddArg3(ptr, val, mem)
  3057  		return true
  3058  	}
  3059  	return false
  3060  }
  3061  func rewriteValueMIPS_OpMIPSMOVHUload(v *Value) bool {
  3062  	v_1 := v.Args[1]
  3063  	v_0 := v.Args[0]
  3064  	// match: (MOVHUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3065  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3066  	// result: (MOVHUload [off1+off2] {sym} ptr mem)
  3067  	for {
  3068  		off1 := auxIntToInt32(v.AuxInt)
  3069  		sym := auxToSym(v.Aux)
  3070  		x := v_0
  3071  		if x.Op != OpMIPSADDconst {
  3072  			break
  3073  		}
  3074  		off2 := auxIntToInt32(x.AuxInt)
  3075  		ptr := x.Args[0]
  3076  		mem := v_1
  3077  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3078  			break
  3079  		}
  3080  		v.reset(OpMIPSMOVHUload)
  3081  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3082  		v.Aux = symToAux(sym)
  3083  		v.AddArg2(ptr, mem)
  3084  		return true
  3085  	}
  3086  	// match: (MOVHUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3087  	// cond: canMergeSym(sym1,sym2)
  3088  	// result: (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3089  	for {
  3090  		off1 := auxIntToInt32(v.AuxInt)
  3091  		sym1 := auxToSym(v.Aux)
  3092  		if v_0.Op != OpMIPSMOVWaddr {
  3093  			break
  3094  		}
  3095  		off2 := auxIntToInt32(v_0.AuxInt)
  3096  		sym2 := auxToSym(v_0.Aux)
  3097  		ptr := v_0.Args[0]
  3098  		mem := v_1
  3099  		if !(canMergeSym(sym1, sym2)) {
  3100  			break
  3101  		}
  3102  		v.reset(OpMIPSMOVHUload)
  3103  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3104  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3105  		v.AddArg2(ptr, mem)
  3106  		return true
  3107  	}
  3108  	// match: (MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  3109  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3110  	// result: (MOVHUreg x)
  3111  	for {
  3112  		off := auxIntToInt32(v.AuxInt)
  3113  		sym := auxToSym(v.Aux)
  3114  		ptr := v_0
  3115  		if v_1.Op != OpMIPSMOVHstore {
  3116  			break
  3117  		}
  3118  		off2 := auxIntToInt32(v_1.AuxInt)
  3119  		sym2 := auxToSym(v_1.Aux)
  3120  		x := v_1.Args[1]
  3121  		ptr2 := v_1.Args[0]
  3122  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3123  			break
  3124  		}
  3125  		v.reset(OpMIPSMOVHUreg)
  3126  		v.AddArg(x)
  3127  		return true
  3128  	}
  3129  	return false
  3130  }
  3131  func rewriteValueMIPS_OpMIPSMOVHUreg(v *Value) bool {
  3132  	v_0 := v.Args[0]
  3133  	b := v.Block
  3134  	// match: (MOVHUreg x:(MOVBUload _ _))
  3135  	// result: (MOVWreg x)
  3136  	for {
  3137  		x := v_0
  3138  		if x.Op != OpMIPSMOVBUload {
  3139  			break
  3140  		}
  3141  		v.reset(OpMIPSMOVWreg)
  3142  		v.AddArg(x)
  3143  		return true
  3144  	}
  3145  	// match: (MOVHUreg x:(MOVHUload _ _))
  3146  	// result: (MOVWreg x)
  3147  	for {
  3148  		x := v_0
  3149  		if x.Op != OpMIPSMOVHUload {
  3150  			break
  3151  		}
  3152  		v.reset(OpMIPSMOVWreg)
  3153  		v.AddArg(x)
  3154  		return true
  3155  	}
  3156  	// match: (MOVHUreg x:(MOVBUreg _))
  3157  	// result: (MOVWreg x)
  3158  	for {
  3159  		x := v_0
  3160  		if x.Op != OpMIPSMOVBUreg {
  3161  			break
  3162  		}
  3163  		v.reset(OpMIPSMOVWreg)
  3164  		v.AddArg(x)
  3165  		return true
  3166  	}
  3167  	// match: (MOVHUreg x:(MOVHUreg _))
  3168  	// result: (MOVWreg x)
  3169  	for {
  3170  		x := v_0
  3171  		if x.Op != OpMIPSMOVHUreg {
  3172  			break
  3173  		}
  3174  		v.reset(OpMIPSMOVWreg)
  3175  		v.AddArg(x)
  3176  		return true
  3177  	}
  3178  	// match: (MOVHUreg <t> x:(MOVHload [off] {sym} ptr mem))
  3179  	// cond: x.Uses == 1 && clobber(x)
  3180  	// result: @x.Block (MOVHUload <t> [off] {sym} ptr mem)
  3181  	for {
  3182  		t := v.Type
  3183  		x := v_0
  3184  		if x.Op != OpMIPSMOVHload {
  3185  			break
  3186  		}
  3187  		off := auxIntToInt32(x.AuxInt)
  3188  		sym := auxToSym(x.Aux)
  3189  		mem := x.Args[1]
  3190  		ptr := x.Args[0]
  3191  		if !(x.Uses == 1 && clobber(x)) {
  3192  			break
  3193  		}
  3194  		b = x.Block
  3195  		v0 := b.NewValue0(x.Pos, OpMIPSMOVHUload, t)
  3196  		v.copyOf(v0)
  3197  		v0.AuxInt = int32ToAuxInt(off)
  3198  		v0.Aux = symToAux(sym)
  3199  		v0.AddArg2(ptr, mem)
  3200  		return true
  3201  	}
  3202  	// match: (MOVHUreg (ANDconst [c] x))
  3203  	// result: (ANDconst [c&0xffff] x)
  3204  	for {
  3205  		if v_0.Op != OpMIPSANDconst {
  3206  			break
  3207  		}
  3208  		c := auxIntToInt32(v_0.AuxInt)
  3209  		x := v_0.Args[0]
  3210  		v.reset(OpMIPSANDconst)
  3211  		v.AuxInt = int32ToAuxInt(c & 0xffff)
  3212  		v.AddArg(x)
  3213  		return true
  3214  	}
  3215  	// match: (MOVHUreg (MOVWconst [c]))
  3216  	// result: (MOVWconst [int32(uint16(c))])
  3217  	for {
  3218  		if v_0.Op != OpMIPSMOVWconst {
  3219  			break
  3220  		}
  3221  		c := auxIntToInt32(v_0.AuxInt)
  3222  		v.reset(OpMIPSMOVWconst)
  3223  		v.AuxInt = int32ToAuxInt(int32(uint16(c)))
  3224  		return true
  3225  	}
  3226  	return false
  3227  }
  3228  func rewriteValueMIPS_OpMIPSMOVHload(v *Value) bool {
  3229  	v_1 := v.Args[1]
  3230  	v_0 := v.Args[0]
  3231  	// match: (MOVHload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3232  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3233  	// result: (MOVHload [off1+off2] {sym} ptr mem)
  3234  	for {
  3235  		off1 := auxIntToInt32(v.AuxInt)
  3236  		sym := auxToSym(v.Aux)
  3237  		x := v_0
  3238  		if x.Op != OpMIPSADDconst {
  3239  			break
  3240  		}
  3241  		off2 := auxIntToInt32(x.AuxInt)
  3242  		ptr := x.Args[0]
  3243  		mem := v_1
  3244  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3245  			break
  3246  		}
  3247  		v.reset(OpMIPSMOVHload)
  3248  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3249  		v.Aux = symToAux(sym)
  3250  		v.AddArg2(ptr, mem)
  3251  		return true
  3252  	}
  3253  	// match: (MOVHload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3254  	// cond: canMergeSym(sym1,sym2)
  3255  	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3256  	for {
  3257  		off1 := auxIntToInt32(v.AuxInt)
  3258  		sym1 := auxToSym(v.Aux)
  3259  		if v_0.Op != OpMIPSMOVWaddr {
  3260  			break
  3261  		}
  3262  		off2 := auxIntToInt32(v_0.AuxInt)
  3263  		sym2 := auxToSym(v_0.Aux)
  3264  		ptr := v_0.Args[0]
  3265  		mem := v_1
  3266  		if !(canMergeSym(sym1, sym2)) {
  3267  			break
  3268  		}
  3269  		v.reset(OpMIPSMOVHload)
  3270  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3271  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3272  		v.AddArg2(ptr, mem)
  3273  		return true
  3274  	}
  3275  	// match: (MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  3276  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3277  	// result: (MOVHreg x)
  3278  	for {
  3279  		off := auxIntToInt32(v.AuxInt)
  3280  		sym := auxToSym(v.Aux)
  3281  		ptr := v_0
  3282  		if v_1.Op != OpMIPSMOVHstore {
  3283  			break
  3284  		}
  3285  		off2 := auxIntToInt32(v_1.AuxInt)
  3286  		sym2 := auxToSym(v_1.Aux)
  3287  		x := v_1.Args[1]
  3288  		ptr2 := v_1.Args[0]
  3289  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3290  			break
  3291  		}
  3292  		v.reset(OpMIPSMOVHreg)
  3293  		v.AddArg(x)
  3294  		return true
  3295  	}
  3296  	return false
  3297  }
  3298  func rewriteValueMIPS_OpMIPSMOVHreg(v *Value) bool {
  3299  	v_0 := v.Args[0]
  3300  	b := v.Block
  3301  	// match: (MOVHreg x:(MOVBload _ _))
  3302  	// result: (MOVWreg x)
  3303  	for {
  3304  		x := v_0
  3305  		if x.Op != OpMIPSMOVBload {
  3306  			break
  3307  		}
  3308  		v.reset(OpMIPSMOVWreg)
  3309  		v.AddArg(x)
  3310  		return true
  3311  	}
  3312  	// match: (MOVHreg x:(MOVBUload _ _))
  3313  	// result: (MOVWreg x)
  3314  	for {
  3315  		x := v_0
  3316  		if x.Op != OpMIPSMOVBUload {
  3317  			break
  3318  		}
  3319  		v.reset(OpMIPSMOVWreg)
  3320  		v.AddArg(x)
  3321  		return true
  3322  	}
  3323  	// match: (MOVHreg x:(MOVHload _ _))
  3324  	// result: (MOVWreg x)
  3325  	for {
  3326  		x := v_0
  3327  		if x.Op != OpMIPSMOVHload {
  3328  			break
  3329  		}
  3330  		v.reset(OpMIPSMOVWreg)
  3331  		v.AddArg(x)
  3332  		return true
  3333  	}
  3334  	// match: (MOVHreg x:(MOVBreg _))
  3335  	// result: (MOVWreg x)
  3336  	for {
  3337  		x := v_0
  3338  		if x.Op != OpMIPSMOVBreg {
  3339  			break
  3340  		}
  3341  		v.reset(OpMIPSMOVWreg)
  3342  		v.AddArg(x)
  3343  		return true
  3344  	}
  3345  	// match: (MOVHreg x:(MOVBUreg _))
  3346  	// result: (MOVWreg x)
  3347  	for {
  3348  		x := v_0
  3349  		if x.Op != OpMIPSMOVBUreg {
  3350  			break
  3351  		}
  3352  		v.reset(OpMIPSMOVWreg)
  3353  		v.AddArg(x)
  3354  		return true
  3355  	}
  3356  	// match: (MOVHreg x:(MOVHreg _))
  3357  	// result: (MOVWreg x)
  3358  	for {
  3359  		x := v_0
  3360  		if x.Op != OpMIPSMOVHreg {
  3361  			break
  3362  		}
  3363  		v.reset(OpMIPSMOVWreg)
  3364  		v.AddArg(x)
  3365  		return true
  3366  	}
  3367  	// match: (MOVHreg <t> x:(MOVHUload [off] {sym} ptr mem))
  3368  	// cond: x.Uses == 1 && clobber(x)
  3369  	// result: @x.Block (MOVHload <t> [off] {sym} ptr mem)
  3370  	for {
  3371  		t := v.Type
  3372  		x := v_0
  3373  		if x.Op != OpMIPSMOVHUload {
  3374  			break
  3375  		}
  3376  		off := auxIntToInt32(x.AuxInt)
  3377  		sym := auxToSym(x.Aux)
  3378  		mem := x.Args[1]
  3379  		ptr := x.Args[0]
  3380  		if !(x.Uses == 1 && clobber(x)) {
  3381  			break
  3382  		}
  3383  		b = x.Block
  3384  		v0 := b.NewValue0(x.Pos, OpMIPSMOVHload, t)
  3385  		v.copyOf(v0)
  3386  		v0.AuxInt = int32ToAuxInt(off)
  3387  		v0.Aux = symToAux(sym)
  3388  		v0.AddArg2(ptr, mem)
  3389  		return true
  3390  	}
  3391  	// match: (MOVHreg (ANDconst [c] x))
  3392  	// cond: c & 0x8000 == 0
  3393  	// result: (ANDconst [c&0x7fff] x)
  3394  	for {
  3395  		if v_0.Op != OpMIPSANDconst {
  3396  			break
  3397  		}
  3398  		c := auxIntToInt32(v_0.AuxInt)
  3399  		x := v_0.Args[0]
  3400  		if !(c&0x8000 == 0) {
  3401  			break
  3402  		}
  3403  		v.reset(OpMIPSANDconst)
  3404  		v.AuxInt = int32ToAuxInt(c & 0x7fff)
  3405  		v.AddArg(x)
  3406  		return true
  3407  	}
  3408  	// match: (MOVHreg (MOVWconst [c]))
  3409  	// result: (MOVWconst [int32(int16(c))])
  3410  	for {
  3411  		if v_0.Op != OpMIPSMOVWconst {
  3412  			break
  3413  		}
  3414  		c := auxIntToInt32(v_0.AuxInt)
  3415  		v.reset(OpMIPSMOVWconst)
  3416  		v.AuxInt = int32ToAuxInt(int32(int16(c)))
  3417  		return true
  3418  	}
  3419  	return false
  3420  }
  3421  func rewriteValueMIPS_OpMIPSMOVHstore(v *Value) bool {
  3422  	v_2 := v.Args[2]
  3423  	v_1 := v.Args[1]
  3424  	v_0 := v.Args[0]
  3425  	// match: (MOVHstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3426  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3427  	// result: (MOVHstore [off1+off2] {sym} ptr val mem)
  3428  	for {
  3429  		off1 := auxIntToInt32(v.AuxInt)
  3430  		sym := auxToSym(v.Aux)
  3431  		x := v_0
  3432  		if x.Op != OpMIPSADDconst {
  3433  			break
  3434  		}
  3435  		off2 := auxIntToInt32(x.AuxInt)
  3436  		ptr := x.Args[0]
  3437  		val := v_1
  3438  		mem := v_2
  3439  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3440  			break
  3441  		}
  3442  		v.reset(OpMIPSMOVHstore)
  3443  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3444  		v.Aux = symToAux(sym)
  3445  		v.AddArg3(ptr, val, mem)
  3446  		return true
  3447  	}
  3448  	// match: (MOVHstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3449  	// cond: canMergeSym(sym1,sym2)
  3450  	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3451  	for {
  3452  		off1 := auxIntToInt32(v.AuxInt)
  3453  		sym1 := auxToSym(v.Aux)
  3454  		if v_0.Op != OpMIPSMOVWaddr {
  3455  			break
  3456  		}
  3457  		off2 := auxIntToInt32(v_0.AuxInt)
  3458  		sym2 := auxToSym(v_0.Aux)
  3459  		ptr := v_0.Args[0]
  3460  		val := v_1
  3461  		mem := v_2
  3462  		if !(canMergeSym(sym1, sym2)) {
  3463  			break
  3464  		}
  3465  		v.reset(OpMIPSMOVHstore)
  3466  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3467  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3468  		v.AddArg3(ptr, val, mem)
  3469  		return true
  3470  	}
  3471  	// match: (MOVHstore [off] {sym} ptr (MOVWconst [0]) mem)
  3472  	// result: (MOVHstorezero [off] {sym} ptr mem)
  3473  	for {
  3474  		off := auxIntToInt32(v.AuxInt)
  3475  		sym := auxToSym(v.Aux)
  3476  		ptr := v_0
  3477  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  3478  			break
  3479  		}
  3480  		mem := v_2
  3481  		v.reset(OpMIPSMOVHstorezero)
  3482  		v.AuxInt = int32ToAuxInt(off)
  3483  		v.Aux = symToAux(sym)
  3484  		v.AddArg2(ptr, mem)
  3485  		return true
  3486  	}
  3487  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
  3488  	// result: (MOVHstore [off] {sym} ptr x mem)
  3489  	for {
  3490  		off := auxIntToInt32(v.AuxInt)
  3491  		sym := auxToSym(v.Aux)
  3492  		ptr := v_0
  3493  		if v_1.Op != OpMIPSMOVHreg {
  3494  			break
  3495  		}
  3496  		x := v_1.Args[0]
  3497  		mem := v_2
  3498  		v.reset(OpMIPSMOVHstore)
  3499  		v.AuxInt = int32ToAuxInt(off)
  3500  		v.Aux = symToAux(sym)
  3501  		v.AddArg3(ptr, x, mem)
  3502  		return true
  3503  	}
  3504  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
  3505  	// result: (MOVHstore [off] {sym} ptr x mem)
  3506  	for {
  3507  		off := auxIntToInt32(v.AuxInt)
  3508  		sym := auxToSym(v.Aux)
  3509  		ptr := v_0
  3510  		if v_1.Op != OpMIPSMOVHUreg {
  3511  			break
  3512  		}
  3513  		x := v_1.Args[0]
  3514  		mem := v_2
  3515  		v.reset(OpMIPSMOVHstore)
  3516  		v.AuxInt = int32ToAuxInt(off)
  3517  		v.Aux = symToAux(sym)
  3518  		v.AddArg3(ptr, x, mem)
  3519  		return true
  3520  	}
  3521  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
  3522  	// result: (MOVHstore [off] {sym} ptr x mem)
  3523  	for {
  3524  		off := auxIntToInt32(v.AuxInt)
  3525  		sym := auxToSym(v.Aux)
  3526  		ptr := v_0
  3527  		if v_1.Op != OpMIPSMOVWreg {
  3528  			break
  3529  		}
  3530  		x := v_1.Args[0]
  3531  		mem := v_2
  3532  		v.reset(OpMIPSMOVHstore)
  3533  		v.AuxInt = int32ToAuxInt(off)
  3534  		v.Aux = symToAux(sym)
  3535  		v.AddArg3(ptr, x, mem)
  3536  		return true
  3537  	}
  3538  	return false
  3539  }
  3540  func rewriteValueMIPS_OpMIPSMOVHstorezero(v *Value) bool {
  3541  	v_1 := v.Args[1]
  3542  	v_0 := v.Args[0]
  3543  	// match: (MOVHstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3544  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3545  	// result: (MOVHstorezero [off1+off2] {sym} ptr mem)
  3546  	for {
  3547  		off1 := auxIntToInt32(v.AuxInt)
  3548  		sym := auxToSym(v.Aux)
  3549  		x := v_0
  3550  		if x.Op != OpMIPSADDconst {
  3551  			break
  3552  		}
  3553  		off2 := auxIntToInt32(x.AuxInt)
  3554  		ptr := x.Args[0]
  3555  		mem := v_1
  3556  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3557  			break
  3558  		}
  3559  		v.reset(OpMIPSMOVHstorezero)
  3560  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3561  		v.Aux = symToAux(sym)
  3562  		v.AddArg2(ptr, mem)
  3563  		return true
  3564  	}
  3565  	// match: (MOVHstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3566  	// cond: canMergeSym(sym1,sym2)
  3567  	// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3568  	for {
  3569  		off1 := auxIntToInt32(v.AuxInt)
  3570  		sym1 := auxToSym(v.Aux)
  3571  		if v_0.Op != OpMIPSMOVWaddr {
  3572  			break
  3573  		}
  3574  		off2 := auxIntToInt32(v_0.AuxInt)
  3575  		sym2 := auxToSym(v_0.Aux)
  3576  		ptr := v_0.Args[0]
  3577  		mem := v_1
  3578  		if !(canMergeSym(sym1, sym2)) {
  3579  			break
  3580  		}
  3581  		v.reset(OpMIPSMOVHstorezero)
  3582  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3583  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3584  		v.AddArg2(ptr, mem)
  3585  		return true
  3586  	}
  3587  	return false
  3588  }
  3589  func rewriteValueMIPS_OpMIPSMOVWload(v *Value) bool {
  3590  	v_1 := v.Args[1]
  3591  	v_0 := v.Args[0]
  3592  	// match: (MOVWload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3593  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3594  	// result: (MOVWload [off1+off2] {sym} ptr mem)
  3595  	for {
  3596  		off1 := auxIntToInt32(v.AuxInt)
  3597  		sym := auxToSym(v.Aux)
  3598  		x := v_0
  3599  		if x.Op != OpMIPSADDconst {
  3600  			break
  3601  		}
  3602  		off2 := auxIntToInt32(x.AuxInt)
  3603  		ptr := x.Args[0]
  3604  		mem := v_1
  3605  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3606  			break
  3607  		}
  3608  		v.reset(OpMIPSMOVWload)
  3609  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3610  		v.Aux = symToAux(sym)
  3611  		v.AddArg2(ptr, mem)
  3612  		return true
  3613  	}
  3614  	// match: (MOVWload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3615  	// cond: canMergeSym(sym1,sym2)
  3616  	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3617  	for {
  3618  		off1 := auxIntToInt32(v.AuxInt)
  3619  		sym1 := auxToSym(v.Aux)
  3620  		if v_0.Op != OpMIPSMOVWaddr {
  3621  			break
  3622  		}
  3623  		off2 := auxIntToInt32(v_0.AuxInt)
  3624  		sym2 := auxToSym(v_0.Aux)
  3625  		ptr := v_0.Args[0]
  3626  		mem := v_1
  3627  		if !(canMergeSym(sym1, sym2)) {
  3628  			break
  3629  		}
  3630  		v.reset(OpMIPSMOVWload)
  3631  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3632  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3633  		v.AddArg2(ptr, mem)
  3634  		return true
  3635  	}
  3636  	// match: (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _))
  3637  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3638  	// result: x
  3639  	for {
  3640  		off := auxIntToInt32(v.AuxInt)
  3641  		sym := auxToSym(v.Aux)
  3642  		ptr := v_0
  3643  		if v_1.Op != OpMIPSMOVWstore {
  3644  			break
  3645  		}
  3646  		off2 := auxIntToInt32(v_1.AuxInt)
  3647  		sym2 := auxToSym(v_1.Aux)
  3648  		x := v_1.Args[1]
  3649  		ptr2 := v_1.Args[0]
  3650  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3651  			break
  3652  		}
  3653  		v.copyOf(x)
  3654  		return true
  3655  	}
  3656  	return false
  3657  }
  3658  func rewriteValueMIPS_OpMIPSMOVWnop(v *Value) bool {
  3659  	v_0 := v.Args[0]
  3660  	// match: (MOVWnop (MOVWconst [c]))
  3661  	// result: (MOVWconst [c])
  3662  	for {
  3663  		if v_0.Op != OpMIPSMOVWconst {
  3664  			break
  3665  		}
  3666  		c := auxIntToInt32(v_0.AuxInt)
  3667  		v.reset(OpMIPSMOVWconst)
  3668  		v.AuxInt = int32ToAuxInt(c)
  3669  		return true
  3670  	}
  3671  	return false
  3672  }
  3673  func rewriteValueMIPS_OpMIPSMOVWreg(v *Value) bool {
  3674  	v_0 := v.Args[0]
  3675  	// match: (MOVWreg x)
  3676  	// cond: x.Uses == 1
  3677  	// result: (MOVWnop x)
  3678  	for {
  3679  		x := v_0
  3680  		if !(x.Uses == 1) {
  3681  			break
  3682  		}
  3683  		v.reset(OpMIPSMOVWnop)
  3684  		v.AddArg(x)
  3685  		return true
  3686  	}
  3687  	// match: (MOVWreg (MOVWconst [c]))
  3688  	// result: (MOVWconst [c])
  3689  	for {
  3690  		if v_0.Op != OpMIPSMOVWconst {
  3691  			break
  3692  		}
  3693  		c := auxIntToInt32(v_0.AuxInt)
  3694  		v.reset(OpMIPSMOVWconst)
  3695  		v.AuxInt = int32ToAuxInt(c)
  3696  		return true
  3697  	}
  3698  	return false
  3699  }
  3700  func rewriteValueMIPS_OpMIPSMOVWstore(v *Value) bool {
  3701  	v_2 := v.Args[2]
  3702  	v_1 := v.Args[1]
  3703  	v_0 := v.Args[0]
  3704  	// match: (MOVWstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3705  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3706  	// result: (MOVWstore [off1+off2] {sym} ptr val mem)
  3707  	for {
  3708  		off1 := auxIntToInt32(v.AuxInt)
  3709  		sym := auxToSym(v.Aux)
  3710  		x := v_0
  3711  		if x.Op != OpMIPSADDconst {
  3712  			break
  3713  		}
  3714  		off2 := auxIntToInt32(x.AuxInt)
  3715  		ptr := x.Args[0]
  3716  		val := v_1
  3717  		mem := v_2
  3718  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3719  			break
  3720  		}
  3721  		v.reset(OpMIPSMOVWstore)
  3722  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3723  		v.Aux = symToAux(sym)
  3724  		v.AddArg3(ptr, val, mem)
  3725  		return true
  3726  	}
  3727  	// match: (MOVWstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3728  	// cond: canMergeSym(sym1,sym2)
  3729  	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3730  	for {
  3731  		off1 := auxIntToInt32(v.AuxInt)
  3732  		sym1 := auxToSym(v.Aux)
  3733  		if v_0.Op != OpMIPSMOVWaddr {
  3734  			break
  3735  		}
  3736  		off2 := auxIntToInt32(v_0.AuxInt)
  3737  		sym2 := auxToSym(v_0.Aux)
  3738  		ptr := v_0.Args[0]
  3739  		val := v_1
  3740  		mem := v_2
  3741  		if !(canMergeSym(sym1, sym2)) {
  3742  			break
  3743  		}
  3744  		v.reset(OpMIPSMOVWstore)
  3745  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3746  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3747  		v.AddArg3(ptr, val, mem)
  3748  		return true
  3749  	}
  3750  	// match: (MOVWstore [off] {sym} ptr (MOVWconst [0]) mem)
  3751  	// result: (MOVWstorezero [off] {sym} ptr mem)
  3752  	for {
  3753  		off := auxIntToInt32(v.AuxInt)
  3754  		sym := auxToSym(v.Aux)
  3755  		ptr := v_0
  3756  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  3757  			break
  3758  		}
  3759  		mem := v_2
  3760  		v.reset(OpMIPSMOVWstorezero)
  3761  		v.AuxInt = int32ToAuxInt(off)
  3762  		v.Aux = symToAux(sym)
  3763  		v.AddArg2(ptr, mem)
  3764  		return true
  3765  	}
  3766  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
  3767  	// result: (MOVWstore [off] {sym} ptr x mem)
  3768  	for {
  3769  		off := auxIntToInt32(v.AuxInt)
  3770  		sym := auxToSym(v.Aux)
  3771  		ptr := v_0
  3772  		if v_1.Op != OpMIPSMOVWreg {
  3773  			break
  3774  		}
  3775  		x := v_1.Args[0]
  3776  		mem := v_2
  3777  		v.reset(OpMIPSMOVWstore)
  3778  		v.AuxInt = int32ToAuxInt(off)
  3779  		v.Aux = symToAux(sym)
  3780  		v.AddArg3(ptr, x, mem)
  3781  		return true
  3782  	}
  3783  	return false
  3784  }
  3785  func rewriteValueMIPS_OpMIPSMOVWstorezero(v *Value) bool {
  3786  	v_1 := v.Args[1]
  3787  	v_0 := v.Args[0]
  3788  	// match: (MOVWstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3789  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3790  	// result: (MOVWstorezero [off1+off2] {sym} ptr mem)
  3791  	for {
  3792  		off1 := auxIntToInt32(v.AuxInt)
  3793  		sym := auxToSym(v.Aux)
  3794  		x := v_0
  3795  		if x.Op != OpMIPSADDconst {
  3796  			break
  3797  		}
  3798  		off2 := auxIntToInt32(x.AuxInt)
  3799  		ptr := x.Args[0]
  3800  		mem := v_1
  3801  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3802  			break
  3803  		}
  3804  		v.reset(OpMIPSMOVWstorezero)
  3805  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3806  		v.Aux = symToAux(sym)
  3807  		v.AddArg2(ptr, mem)
  3808  		return true
  3809  	}
  3810  	// match: (MOVWstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3811  	// cond: canMergeSym(sym1,sym2)
  3812  	// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3813  	for {
  3814  		off1 := auxIntToInt32(v.AuxInt)
  3815  		sym1 := auxToSym(v.Aux)
  3816  		if v_0.Op != OpMIPSMOVWaddr {
  3817  			break
  3818  		}
  3819  		off2 := auxIntToInt32(v_0.AuxInt)
  3820  		sym2 := auxToSym(v_0.Aux)
  3821  		ptr := v_0.Args[0]
  3822  		mem := v_1
  3823  		if !(canMergeSym(sym1, sym2)) {
  3824  			break
  3825  		}
  3826  		v.reset(OpMIPSMOVWstorezero)
  3827  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3828  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3829  		v.AddArg2(ptr, mem)
  3830  		return true
  3831  	}
  3832  	return false
  3833  }
  3834  func rewriteValueMIPS_OpMIPSMUL(v *Value) bool {
  3835  	v_1 := v.Args[1]
  3836  	v_0 := v.Args[0]
  3837  	// match: (MUL (MOVWconst [0]) _ )
  3838  	// result: (MOVWconst [0])
  3839  	for {
  3840  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3841  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  3842  				continue
  3843  			}
  3844  			v.reset(OpMIPSMOVWconst)
  3845  			v.AuxInt = int32ToAuxInt(0)
  3846  			return true
  3847  		}
  3848  		break
  3849  	}
  3850  	// match: (MUL (MOVWconst [1]) x )
  3851  	// result: x
  3852  	for {
  3853  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3854  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 1 {
  3855  				continue
  3856  			}
  3857  			x := v_1
  3858  			v.copyOf(x)
  3859  			return true
  3860  		}
  3861  		break
  3862  	}
  3863  	// match: (MUL (MOVWconst [-1]) x )
  3864  	// result: (NEG x)
  3865  	for {
  3866  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3867  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != -1 {
  3868  				continue
  3869  			}
  3870  			x := v_1
  3871  			v.reset(OpMIPSNEG)
  3872  			v.AddArg(x)
  3873  			return true
  3874  		}
  3875  		break
  3876  	}
  3877  	// match: (MUL (MOVWconst [c]) x )
  3878  	// cond: isPowerOfTwo64(int64(uint32(c)))
  3879  	// result: (SLLconst [int32(log2uint32(int64(c)))] x)
  3880  	for {
  3881  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3882  			if v_0.Op != OpMIPSMOVWconst {
  3883  				continue
  3884  			}
  3885  			c := auxIntToInt32(v_0.AuxInt)
  3886  			x := v_1
  3887  			if !(isPowerOfTwo64(int64(uint32(c)))) {
  3888  				continue
  3889  			}
  3890  			v.reset(OpMIPSSLLconst)
  3891  			v.AuxInt = int32ToAuxInt(int32(log2uint32(int64(c))))
  3892  			v.AddArg(x)
  3893  			return true
  3894  		}
  3895  		break
  3896  	}
  3897  	// match: (MUL (MOVWconst [c]) (MOVWconst [d]))
  3898  	// result: (MOVWconst [c*d])
  3899  	for {
  3900  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3901  			if v_0.Op != OpMIPSMOVWconst {
  3902  				continue
  3903  			}
  3904  			c := auxIntToInt32(v_0.AuxInt)
  3905  			if v_1.Op != OpMIPSMOVWconst {
  3906  				continue
  3907  			}
  3908  			d := auxIntToInt32(v_1.AuxInt)
  3909  			v.reset(OpMIPSMOVWconst)
  3910  			v.AuxInt = int32ToAuxInt(c * d)
  3911  			return true
  3912  		}
  3913  		break
  3914  	}
  3915  	return false
  3916  }
  3917  func rewriteValueMIPS_OpMIPSNEG(v *Value) bool {
  3918  	v_0 := v.Args[0]
  3919  	// match: (NEG (MOVWconst [c]))
  3920  	// result: (MOVWconst [-c])
  3921  	for {
  3922  		if v_0.Op != OpMIPSMOVWconst {
  3923  			break
  3924  		}
  3925  		c := auxIntToInt32(v_0.AuxInt)
  3926  		v.reset(OpMIPSMOVWconst)
  3927  		v.AuxInt = int32ToAuxInt(-c)
  3928  		return true
  3929  	}
  3930  	return false
  3931  }
  3932  func rewriteValueMIPS_OpMIPSNOR(v *Value) bool {
  3933  	v_1 := v.Args[1]
  3934  	v_0 := v.Args[0]
  3935  	// match: (NOR x (MOVWconst [c]))
  3936  	// result: (NORconst [c] x)
  3937  	for {
  3938  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3939  			x := v_0
  3940  			if v_1.Op != OpMIPSMOVWconst {
  3941  				continue
  3942  			}
  3943  			c := auxIntToInt32(v_1.AuxInt)
  3944  			v.reset(OpMIPSNORconst)
  3945  			v.AuxInt = int32ToAuxInt(c)
  3946  			v.AddArg(x)
  3947  			return true
  3948  		}
  3949  		break
  3950  	}
  3951  	return false
  3952  }
  3953  func rewriteValueMIPS_OpMIPSNORconst(v *Value) bool {
  3954  	v_0 := v.Args[0]
  3955  	// match: (NORconst [c] (MOVWconst [d]))
  3956  	// result: (MOVWconst [^(c|d)])
  3957  	for {
  3958  		c := auxIntToInt32(v.AuxInt)
  3959  		if v_0.Op != OpMIPSMOVWconst {
  3960  			break
  3961  		}
  3962  		d := auxIntToInt32(v_0.AuxInt)
  3963  		v.reset(OpMIPSMOVWconst)
  3964  		v.AuxInt = int32ToAuxInt(^(c | d))
  3965  		return true
  3966  	}
  3967  	return false
  3968  }
  3969  func rewriteValueMIPS_OpMIPSOR(v *Value) bool {
  3970  	v_1 := v.Args[1]
  3971  	v_0 := v.Args[0]
  3972  	b := v.Block
  3973  	// match: (OR x (MOVWconst [c]))
  3974  	// result: (ORconst [c] x)
  3975  	for {
  3976  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3977  			x := v_0
  3978  			if v_1.Op != OpMIPSMOVWconst {
  3979  				continue
  3980  			}
  3981  			c := auxIntToInt32(v_1.AuxInt)
  3982  			v.reset(OpMIPSORconst)
  3983  			v.AuxInt = int32ToAuxInt(c)
  3984  			v.AddArg(x)
  3985  			return true
  3986  		}
  3987  		break
  3988  	}
  3989  	// match: (OR x x)
  3990  	// result: x
  3991  	for {
  3992  		x := v_0
  3993  		if x != v_1 {
  3994  			break
  3995  		}
  3996  		v.copyOf(x)
  3997  		return true
  3998  	}
  3999  	// match: (OR (SGTUzero x) (SGTUzero y))
  4000  	// result: (SGTUzero (OR <x.Type> x y))
  4001  	for {
  4002  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4003  			if v_0.Op != OpMIPSSGTUzero {
  4004  				continue
  4005  			}
  4006  			x := v_0.Args[0]
  4007  			if v_1.Op != OpMIPSSGTUzero {
  4008  				continue
  4009  			}
  4010  			y := v_1.Args[0]
  4011  			v.reset(OpMIPSSGTUzero)
  4012  			v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  4013  			v0.AddArg2(x, y)
  4014  			v.AddArg(v0)
  4015  			return true
  4016  		}
  4017  		break
  4018  	}
  4019  	return false
  4020  }
  4021  func rewriteValueMIPS_OpMIPSORconst(v *Value) bool {
  4022  	v_0 := v.Args[0]
  4023  	// match: (ORconst [0] x)
  4024  	// result: x
  4025  	for {
  4026  		if auxIntToInt32(v.AuxInt) != 0 {
  4027  			break
  4028  		}
  4029  		x := v_0
  4030  		v.copyOf(x)
  4031  		return true
  4032  	}
  4033  	// match: (ORconst [-1] _)
  4034  	// result: (MOVWconst [-1])
  4035  	for {
  4036  		if auxIntToInt32(v.AuxInt) != -1 {
  4037  			break
  4038  		}
  4039  		v.reset(OpMIPSMOVWconst)
  4040  		v.AuxInt = int32ToAuxInt(-1)
  4041  		return true
  4042  	}
  4043  	// match: (ORconst [c] (MOVWconst [d]))
  4044  	// result: (MOVWconst [c|d])
  4045  	for {
  4046  		c := auxIntToInt32(v.AuxInt)
  4047  		if v_0.Op != OpMIPSMOVWconst {
  4048  			break
  4049  		}
  4050  		d := auxIntToInt32(v_0.AuxInt)
  4051  		v.reset(OpMIPSMOVWconst)
  4052  		v.AuxInt = int32ToAuxInt(c | d)
  4053  		return true
  4054  	}
  4055  	// match: (ORconst [c] (ORconst [d] x))
  4056  	// result: (ORconst [c|d] x)
  4057  	for {
  4058  		c := auxIntToInt32(v.AuxInt)
  4059  		if v_0.Op != OpMIPSORconst {
  4060  			break
  4061  		}
  4062  		d := auxIntToInt32(v_0.AuxInt)
  4063  		x := v_0.Args[0]
  4064  		v.reset(OpMIPSORconst)
  4065  		v.AuxInt = int32ToAuxInt(c | d)
  4066  		v.AddArg(x)
  4067  		return true
  4068  	}
  4069  	return false
  4070  }
  4071  func rewriteValueMIPS_OpMIPSSGT(v *Value) bool {
  4072  	v_1 := v.Args[1]
  4073  	v_0 := v.Args[0]
  4074  	// match: (SGT (MOVWconst [c]) x)
  4075  	// result: (SGTconst [c] x)
  4076  	for {
  4077  		if v_0.Op != OpMIPSMOVWconst {
  4078  			break
  4079  		}
  4080  		c := auxIntToInt32(v_0.AuxInt)
  4081  		x := v_1
  4082  		v.reset(OpMIPSSGTconst)
  4083  		v.AuxInt = int32ToAuxInt(c)
  4084  		v.AddArg(x)
  4085  		return true
  4086  	}
  4087  	// match: (SGT x (MOVWconst [0]))
  4088  	// result: (SGTzero x)
  4089  	for {
  4090  		x := v_0
  4091  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4092  			break
  4093  		}
  4094  		v.reset(OpMIPSSGTzero)
  4095  		v.AddArg(x)
  4096  		return true
  4097  	}
  4098  	return false
  4099  }
  4100  func rewriteValueMIPS_OpMIPSSGTU(v *Value) bool {
  4101  	v_1 := v.Args[1]
  4102  	v_0 := v.Args[0]
  4103  	// match: (SGTU (MOVWconst [c]) x)
  4104  	// result: (SGTUconst [c] x)
  4105  	for {
  4106  		if v_0.Op != OpMIPSMOVWconst {
  4107  			break
  4108  		}
  4109  		c := auxIntToInt32(v_0.AuxInt)
  4110  		x := v_1
  4111  		v.reset(OpMIPSSGTUconst)
  4112  		v.AuxInt = int32ToAuxInt(c)
  4113  		v.AddArg(x)
  4114  		return true
  4115  	}
  4116  	// match: (SGTU x (MOVWconst [0]))
  4117  	// result: (SGTUzero x)
  4118  	for {
  4119  		x := v_0
  4120  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4121  			break
  4122  		}
  4123  		v.reset(OpMIPSSGTUzero)
  4124  		v.AddArg(x)
  4125  		return true
  4126  	}
  4127  	return false
  4128  }
  4129  func rewriteValueMIPS_OpMIPSSGTUconst(v *Value) bool {
  4130  	v_0 := v.Args[0]
  4131  	// match: (SGTUconst [c] (MOVWconst [d]))
  4132  	// cond: uint32(c) > uint32(d)
  4133  	// result: (MOVWconst [1])
  4134  	for {
  4135  		c := auxIntToInt32(v.AuxInt)
  4136  		if v_0.Op != OpMIPSMOVWconst {
  4137  			break
  4138  		}
  4139  		d := auxIntToInt32(v_0.AuxInt)
  4140  		if !(uint32(c) > uint32(d)) {
  4141  			break
  4142  		}
  4143  		v.reset(OpMIPSMOVWconst)
  4144  		v.AuxInt = int32ToAuxInt(1)
  4145  		return true
  4146  	}
  4147  	// match: (SGTUconst [c] (MOVWconst [d]))
  4148  	// cond: uint32(c) <= uint32(d)
  4149  	// result: (MOVWconst [0])
  4150  	for {
  4151  		c := auxIntToInt32(v.AuxInt)
  4152  		if v_0.Op != OpMIPSMOVWconst {
  4153  			break
  4154  		}
  4155  		d := auxIntToInt32(v_0.AuxInt)
  4156  		if !(uint32(c) <= uint32(d)) {
  4157  			break
  4158  		}
  4159  		v.reset(OpMIPSMOVWconst)
  4160  		v.AuxInt = int32ToAuxInt(0)
  4161  		return true
  4162  	}
  4163  	// match: (SGTUconst [c] (MOVBUreg _))
  4164  	// cond: 0xff < uint32(c)
  4165  	// result: (MOVWconst [1])
  4166  	for {
  4167  		c := auxIntToInt32(v.AuxInt)
  4168  		if v_0.Op != OpMIPSMOVBUreg || !(0xff < uint32(c)) {
  4169  			break
  4170  		}
  4171  		v.reset(OpMIPSMOVWconst)
  4172  		v.AuxInt = int32ToAuxInt(1)
  4173  		return true
  4174  	}
  4175  	// match: (SGTUconst [c] (MOVHUreg _))
  4176  	// cond: 0xffff < uint32(c)
  4177  	// result: (MOVWconst [1])
  4178  	for {
  4179  		c := auxIntToInt32(v.AuxInt)
  4180  		if v_0.Op != OpMIPSMOVHUreg || !(0xffff < uint32(c)) {
  4181  			break
  4182  		}
  4183  		v.reset(OpMIPSMOVWconst)
  4184  		v.AuxInt = int32ToAuxInt(1)
  4185  		return true
  4186  	}
  4187  	// match: (SGTUconst [c] (ANDconst [m] _))
  4188  	// cond: uint32(m) < uint32(c)
  4189  	// result: (MOVWconst [1])
  4190  	for {
  4191  		c := auxIntToInt32(v.AuxInt)
  4192  		if v_0.Op != OpMIPSANDconst {
  4193  			break
  4194  		}
  4195  		m := auxIntToInt32(v_0.AuxInt)
  4196  		if !(uint32(m) < uint32(c)) {
  4197  			break
  4198  		}
  4199  		v.reset(OpMIPSMOVWconst)
  4200  		v.AuxInt = int32ToAuxInt(1)
  4201  		return true
  4202  	}
  4203  	// match: (SGTUconst [c] (SRLconst _ [d]))
  4204  	// cond: uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)
  4205  	// result: (MOVWconst [1])
  4206  	for {
  4207  		c := auxIntToInt32(v.AuxInt)
  4208  		if v_0.Op != OpMIPSSRLconst {
  4209  			break
  4210  		}
  4211  		d := auxIntToInt32(v_0.AuxInt)
  4212  		if !(uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)) {
  4213  			break
  4214  		}
  4215  		v.reset(OpMIPSMOVWconst)
  4216  		v.AuxInt = int32ToAuxInt(1)
  4217  		return true
  4218  	}
  4219  	return false
  4220  }
  4221  func rewriteValueMIPS_OpMIPSSGTUzero(v *Value) bool {
  4222  	v_0 := v.Args[0]
  4223  	// match: (SGTUzero (MOVWconst [d]))
  4224  	// cond: d != 0
  4225  	// result: (MOVWconst [1])
  4226  	for {
  4227  		if v_0.Op != OpMIPSMOVWconst {
  4228  			break
  4229  		}
  4230  		d := auxIntToInt32(v_0.AuxInt)
  4231  		if !(d != 0) {
  4232  			break
  4233  		}
  4234  		v.reset(OpMIPSMOVWconst)
  4235  		v.AuxInt = int32ToAuxInt(1)
  4236  		return true
  4237  	}
  4238  	// match: (SGTUzero (MOVWconst [d]))
  4239  	// cond: d == 0
  4240  	// result: (MOVWconst [0])
  4241  	for {
  4242  		if v_0.Op != OpMIPSMOVWconst {
  4243  			break
  4244  		}
  4245  		d := auxIntToInt32(v_0.AuxInt)
  4246  		if !(d == 0) {
  4247  			break
  4248  		}
  4249  		v.reset(OpMIPSMOVWconst)
  4250  		v.AuxInt = int32ToAuxInt(0)
  4251  		return true
  4252  	}
  4253  	return false
  4254  }
  4255  func rewriteValueMIPS_OpMIPSSGTconst(v *Value) bool {
  4256  	v_0 := v.Args[0]
  4257  	// match: (SGTconst [c] (MOVWconst [d]))
  4258  	// cond: c > d
  4259  	// result: (MOVWconst [1])
  4260  	for {
  4261  		c := auxIntToInt32(v.AuxInt)
  4262  		if v_0.Op != OpMIPSMOVWconst {
  4263  			break
  4264  		}
  4265  		d := auxIntToInt32(v_0.AuxInt)
  4266  		if !(c > d) {
  4267  			break
  4268  		}
  4269  		v.reset(OpMIPSMOVWconst)
  4270  		v.AuxInt = int32ToAuxInt(1)
  4271  		return true
  4272  	}
  4273  	// match: (SGTconst [c] (MOVWconst [d]))
  4274  	// cond: c <= d
  4275  	// result: (MOVWconst [0])
  4276  	for {
  4277  		c := auxIntToInt32(v.AuxInt)
  4278  		if v_0.Op != OpMIPSMOVWconst {
  4279  			break
  4280  		}
  4281  		d := auxIntToInt32(v_0.AuxInt)
  4282  		if !(c <= d) {
  4283  			break
  4284  		}
  4285  		v.reset(OpMIPSMOVWconst)
  4286  		v.AuxInt = int32ToAuxInt(0)
  4287  		return true
  4288  	}
  4289  	// match: (SGTconst [c] (MOVBreg _))
  4290  	// cond: 0x7f < c
  4291  	// result: (MOVWconst [1])
  4292  	for {
  4293  		c := auxIntToInt32(v.AuxInt)
  4294  		if v_0.Op != OpMIPSMOVBreg || !(0x7f < c) {
  4295  			break
  4296  		}
  4297  		v.reset(OpMIPSMOVWconst)
  4298  		v.AuxInt = int32ToAuxInt(1)
  4299  		return true
  4300  	}
  4301  	// match: (SGTconst [c] (MOVBreg _))
  4302  	// cond: c <= -0x80
  4303  	// result: (MOVWconst [0])
  4304  	for {
  4305  		c := auxIntToInt32(v.AuxInt)
  4306  		if v_0.Op != OpMIPSMOVBreg || !(c <= -0x80) {
  4307  			break
  4308  		}
  4309  		v.reset(OpMIPSMOVWconst)
  4310  		v.AuxInt = int32ToAuxInt(0)
  4311  		return true
  4312  	}
  4313  	// match: (SGTconst [c] (MOVBUreg _))
  4314  	// cond: 0xff < c
  4315  	// result: (MOVWconst [1])
  4316  	for {
  4317  		c := auxIntToInt32(v.AuxInt)
  4318  		if v_0.Op != OpMIPSMOVBUreg || !(0xff < c) {
  4319  			break
  4320  		}
  4321  		v.reset(OpMIPSMOVWconst)
  4322  		v.AuxInt = int32ToAuxInt(1)
  4323  		return true
  4324  	}
  4325  	// match: (SGTconst [c] (MOVBUreg _))
  4326  	// cond: c < 0
  4327  	// result: (MOVWconst [0])
  4328  	for {
  4329  		c := auxIntToInt32(v.AuxInt)
  4330  		if v_0.Op != OpMIPSMOVBUreg || !(c < 0) {
  4331  			break
  4332  		}
  4333  		v.reset(OpMIPSMOVWconst)
  4334  		v.AuxInt = int32ToAuxInt(0)
  4335  		return true
  4336  	}
  4337  	// match: (SGTconst [c] (MOVHreg _))
  4338  	// cond: 0x7fff < c
  4339  	// result: (MOVWconst [1])
  4340  	for {
  4341  		c := auxIntToInt32(v.AuxInt)
  4342  		if v_0.Op != OpMIPSMOVHreg || !(0x7fff < c) {
  4343  			break
  4344  		}
  4345  		v.reset(OpMIPSMOVWconst)
  4346  		v.AuxInt = int32ToAuxInt(1)
  4347  		return true
  4348  	}
  4349  	// match: (SGTconst [c] (MOVHreg _))
  4350  	// cond: c <= -0x8000
  4351  	// result: (MOVWconst [0])
  4352  	for {
  4353  		c := auxIntToInt32(v.AuxInt)
  4354  		if v_0.Op != OpMIPSMOVHreg || !(c <= -0x8000) {
  4355  			break
  4356  		}
  4357  		v.reset(OpMIPSMOVWconst)
  4358  		v.AuxInt = int32ToAuxInt(0)
  4359  		return true
  4360  	}
  4361  	// match: (SGTconst [c] (MOVHUreg _))
  4362  	// cond: 0xffff < c
  4363  	// result: (MOVWconst [1])
  4364  	for {
  4365  		c := auxIntToInt32(v.AuxInt)
  4366  		if v_0.Op != OpMIPSMOVHUreg || !(0xffff < c) {
  4367  			break
  4368  		}
  4369  		v.reset(OpMIPSMOVWconst)
  4370  		v.AuxInt = int32ToAuxInt(1)
  4371  		return true
  4372  	}
  4373  	// match: (SGTconst [c] (MOVHUreg _))
  4374  	// cond: c < 0
  4375  	// result: (MOVWconst [0])
  4376  	for {
  4377  		c := auxIntToInt32(v.AuxInt)
  4378  		if v_0.Op != OpMIPSMOVHUreg || !(c < 0) {
  4379  			break
  4380  		}
  4381  		v.reset(OpMIPSMOVWconst)
  4382  		v.AuxInt = int32ToAuxInt(0)
  4383  		return true
  4384  	}
  4385  	// match: (SGTconst [c] (ANDconst [m] _))
  4386  	// cond: 0 <= m && m < c
  4387  	// result: (MOVWconst [1])
  4388  	for {
  4389  		c := auxIntToInt32(v.AuxInt)
  4390  		if v_0.Op != OpMIPSANDconst {
  4391  			break
  4392  		}
  4393  		m := auxIntToInt32(v_0.AuxInt)
  4394  		if !(0 <= m && m < c) {
  4395  			break
  4396  		}
  4397  		v.reset(OpMIPSMOVWconst)
  4398  		v.AuxInt = int32ToAuxInt(1)
  4399  		return true
  4400  	}
  4401  	// match: (SGTconst [c] (SRLconst _ [d]))
  4402  	// cond: 0 <= c && uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)
  4403  	// result: (MOVWconst [1])
  4404  	for {
  4405  		c := auxIntToInt32(v.AuxInt)
  4406  		if v_0.Op != OpMIPSSRLconst {
  4407  			break
  4408  		}
  4409  		d := auxIntToInt32(v_0.AuxInt)
  4410  		if !(0 <= c && uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)) {
  4411  			break
  4412  		}
  4413  		v.reset(OpMIPSMOVWconst)
  4414  		v.AuxInt = int32ToAuxInt(1)
  4415  		return true
  4416  	}
  4417  	return false
  4418  }
  4419  func rewriteValueMIPS_OpMIPSSGTzero(v *Value) bool {
  4420  	v_0 := v.Args[0]
  4421  	// match: (SGTzero (MOVWconst [d]))
  4422  	// cond: d > 0
  4423  	// result: (MOVWconst [1])
  4424  	for {
  4425  		if v_0.Op != OpMIPSMOVWconst {
  4426  			break
  4427  		}
  4428  		d := auxIntToInt32(v_0.AuxInt)
  4429  		if !(d > 0) {
  4430  			break
  4431  		}
  4432  		v.reset(OpMIPSMOVWconst)
  4433  		v.AuxInt = int32ToAuxInt(1)
  4434  		return true
  4435  	}
  4436  	// match: (SGTzero (MOVWconst [d]))
  4437  	// cond: d <= 0
  4438  	// result: (MOVWconst [0])
  4439  	for {
  4440  		if v_0.Op != OpMIPSMOVWconst {
  4441  			break
  4442  		}
  4443  		d := auxIntToInt32(v_0.AuxInt)
  4444  		if !(d <= 0) {
  4445  			break
  4446  		}
  4447  		v.reset(OpMIPSMOVWconst)
  4448  		v.AuxInt = int32ToAuxInt(0)
  4449  		return true
  4450  	}
  4451  	return false
  4452  }
  4453  func rewriteValueMIPS_OpMIPSSLL(v *Value) bool {
  4454  	v_1 := v.Args[1]
  4455  	v_0 := v.Args[0]
  4456  	// match: (SLL x (MOVWconst [c]))
  4457  	// result: (SLLconst x [c&31])
  4458  	for {
  4459  		x := v_0
  4460  		if v_1.Op != OpMIPSMOVWconst {
  4461  			break
  4462  		}
  4463  		c := auxIntToInt32(v_1.AuxInt)
  4464  		v.reset(OpMIPSSLLconst)
  4465  		v.AuxInt = int32ToAuxInt(c & 31)
  4466  		v.AddArg(x)
  4467  		return true
  4468  	}
  4469  	return false
  4470  }
  4471  func rewriteValueMIPS_OpMIPSSLLconst(v *Value) bool {
  4472  	v_0 := v.Args[0]
  4473  	// match: (SLLconst [c] (MOVWconst [d]))
  4474  	// result: (MOVWconst [d<<uint32(c)])
  4475  	for {
  4476  		c := auxIntToInt32(v.AuxInt)
  4477  		if v_0.Op != OpMIPSMOVWconst {
  4478  			break
  4479  		}
  4480  		d := auxIntToInt32(v_0.AuxInt)
  4481  		v.reset(OpMIPSMOVWconst)
  4482  		v.AuxInt = int32ToAuxInt(d << uint32(c))
  4483  		return true
  4484  	}
  4485  	return false
  4486  }
  4487  func rewriteValueMIPS_OpMIPSSRA(v *Value) bool {
  4488  	v_1 := v.Args[1]
  4489  	v_0 := v.Args[0]
  4490  	// match: (SRA x (MOVWconst [c]))
  4491  	// result: (SRAconst x [c&31])
  4492  	for {
  4493  		x := v_0
  4494  		if v_1.Op != OpMIPSMOVWconst {
  4495  			break
  4496  		}
  4497  		c := auxIntToInt32(v_1.AuxInt)
  4498  		v.reset(OpMIPSSRAconst)
  4499  		v.AuxInt = int32ToAuxInt(c & 31)
  4500  		v.AddArg(x)
  4501  		return true
  4502  	}
  4503  	return false
  4504  }
  4505  func rewriteValueMIPS_OpMIPSSRAconst(v *Value) bool {
  4506  	v_0 := v.Args[0]
  4507  	// match: (SRAconst [c] (MOVWconst [d]))
  4508  	// result: (MOVWconst [d>>uint32(c)])
  4509  	for {
  4510  		c := auxIntToInt32(v.AuxInt)
  4511  		if v_0.Op != OpMIPSMOVWconst {
  4512  			break
  4513  		}
  4514  		d := auxIntToInt32(v_0.AuxInt)
  4515  		v.reset(OpMIPSMOVWconst)
  4516  		v.AuxInt = int32ToAuxInt(d >> uint32(c))
  4517  		return true
  4518  	}
  4519  	return false
  4520  }
  4521  func rewriteValueMIPS_OpMIPSSRL(v *Value) bool {
  4522  	v_1 := v.Args[1]
  4523  	v_0 := v.Args[0]
  4524  	// match: (SRL x (MOVWconst [c]))
  4525  	// result: (SRLconst x [c&31])
  4526  	for {
  4527  		x := v_0
  4528  		if v_1.Op != OpMIPSMOVWconst {
  4529  			break
  4530  		}
  4531  		c := auxIntToInt32(v_1.AuxInt)
  4532  		v.reset(OpMIPSSRLconst)
  4533  		v.AuxInt = int32ToAuxInt(c & 31)
  4534  		v.AddArg(x)
  4535  		return true
  4536  	}
  4537  	return false
  4538  }
  4539  func rewriteValueMIPS_OpMIPSSRLconst(v *Value) bool {
  4540  	v_0 := v.Args[0]
  4541  	// match: (SRLconst [c] (MOVWconst [d]))
  4542  	// result: (MOVWconst [int32(uint32(d)>>uint32(c))])
  4543  	for {
  4544  		c := auxIntToInt32(v.AuxInt)
  4545  		if v_0.Op != OpMIPSMOVWconst {
  4546  			break
  4547  		}
  4548  		d := auxIntToInt32(v_0.AuxInt)
  4549  		v.reset(OpMIPSMOVWconst)
  4550  		v.AuxInt = int32ToAuxInt(int32(uint32(d) >> uint32(c)))
  4551  		return true
  4552  	}
  4553  	return false
  4554  }
  4555  func rewriteValueMIPS_OpMIPSSUB(v *Value) bool {
  4556  	v_1 := v.Args[1]
  4557  	v_0 := v.Args[0]
  4558  	// match: (SUB x (MOVWconst [c]))
  4559  	// result: (SUBconst [c] x)
  4560  	for {
  4561  		x := v_0
  4562  		if v_1.Op != OpMIPSMOVWconst {
  4563  			break
  4564  		}
  4565  		c := auxIntToInt32(v_1.AuxInt)
  4566  		v.reset(OpMIPSSUBconst)
  4567  		v.AuxInt = int32ToAuxInt(c)
  4568  		v.AddArg(x)
  4569  		return true
  4570  	}
  4571  	// match: (SUB x x)
  4572  	// result: (MOVWconst [0])
  4573  	for {
  4574  		x := v_0
  4575  		if x != v_1 {
  4576  			break
  4577  		}
  4578  		v.reset(OpMIPSMOVWconst)
  4579  		v.AuxInt = int32ToAuxInt(0)
  4580  		return true
  4581  	}
  4582  	// match: (SUB (MOVWconst [0]) x)
  4583  	// result: (NEG x)
  4584  	for {
  4585  		if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4586  			break
  4587  		}
  4588  		x := v_1
  4589  		v.reset(OpMIPSNEG)
  4590  		v.AddArg(x)
  4591  		return true
  4592  	}
  4593  	return false
  4594  }
  4595  func rewriteValueMIPS_OpMIPSSUBconst(v *Value) bool {
  4596  	v_0 := v.Args[0]
  4597  	// match: (SUBconst [0] x)
  4598  	// result: x
  4599  	for {
  4600  		if auxIntToInt32(v.AuxInt) != 0 {
  4601  			break
  4602  		}
  4603  		x := v_0
  4604  		v.copyOf(x)
  4605  		return true
  4606  	}
  4607  	// match: (SUBconst [c] (MOVWconst [d]))
  4608  	// result: (MOVWconst [d-c])
  4609  	for {
  4610  		c := auxIntToInt32(v.AuxInt)
  4611  		if v_0.Op != OpMIPSMOVWconst {
  4612  			break
  4613  		}
  4614  		d := auxIntToInt32(v_0.AuxInt)
  4615  		v.reset(OpMIPSMOVWconst)
  4616  		v.AuxInt = int32ToAuxInt(d - c)
  4617  		return true
  4618  	}
  4619  	// match: (SUBconst [c] (SUBconst [d] x))
  4620  	// result: (ADDconst [-c-d] x)
  4621  	for {
  4622  		c := auxIntToInt32(v.AuxInt)
  4623  		if v_0.Op != OpMIPSSUBconst {
  4624  			break
  4625  		}
  4626  		d := auxIntToInt32(v_0.AuxInt)
  4627  		x := v_0.Args[0]
  4628  		v.reset(OpMIPSADDconst)
  4629  		v.AuxInt = int32ToAuxInt(-c - d)
  4630  		v.AddArg(x)
  4631  		return true
  4632  	}
  4633  	// match: (SUBconst [c] (ADDconst [d] x))
  4634  	// result: (ADDconst [-c+d] x)
  4635  	for {
  4636  		c := auxIntToInt32(v.AuxInt)
  4637  		if v_0.Op != OpMIPSADDconst {
  4638  			break
  4639  		}
  4640  		d := auxIntToInt32(v_0.AuxInt)
  4641  		x := v_0.Args[0]
  4642  		v.reset(OpMIPSADDconst)
  4643  		v.AuxInt = int32ToAuxInt(-c + d)
  4644  		v.AddArg(x)
  4645  		return true
  4646  	}
  4647  	return false
  4648  }
  4649  func rewriteValueMIPS_OpMIPSXOR(v *Value) bool {
  4650  	v_1 := v.Args[1]
  4651  	v_0 := v.Args[0]
  4652  	// match: (XOR x (MOVWconst [c]))
  4653  	// result: (XORconst [c] x)
  4654  	for {
  4655  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4656  			x := v_0
  4657  			if v_1.Op != OpMIPSMOVWconst {
  4658  				continue
  4659  			}
  4660  			c := auxIntToInt32(v_1.AuxInt)
  4661  			v.reset(OpMIPSXORconst)
  4662  			v.AuxInt = int32ToAuxInt(c)
  4663  			v.AddArg(x)
  4664  			return true
  4665  		}
  4666  		break
  4667  	}
  4668  	// match: (XOR x x)
  4669  	// result: (MOVWconst [0])
  4670  	for {
  4671  		x := v_0
  4672  		if x != v_1 {
  4673  			break
  4674  		}
  4675  		v.reset(OpMIPSMOVWconst)
  4676  		v.AuxInt = int32ToAuxInt(0)
  4677  		return true
  4678  	}
  4679  	return false
  4680  }
  4681  func rewriteValueMIPS_OpMIPSXORconst(v *Value) bool {
  4682  	v_0 := v.Args[0]
  4683  	// match: (XORconst [0] x)
  4684  	// result: x
  4685  	for {
  4686  		if auxIntToInt32(v.AuxInt) != 0 {
  4687  			break
  4688  		}
  4689  		x := v_0
  4690  		v.copyOf(x)
  4691  		return true
  4692  	}
  4693  	// match: (XORconst [-1] x)
  4694  	// result: (NORconst [0] x)
  4695  	for {
  4696  		if auxIntToInt32(v.AuxInt) != -1 {
  4697  			break
  4698  		}
  4699  		x := v_0
  4700  		v.reset(OpMIPSNORconst)
  4701  		v.AuxInt = int32ToAuxInt(0)
  4702  		v.AddArg(x)
  4703  		return true
  4704  	}
  4705  	// match: (XORconst [c] (MOVWconst [d]))
  4706  	// result: (MOVWconst [c^d])
  4707  	for {
  4708  		c := auxIntToInt32(v.AuxInt)
  4709  		if v_0.Op != OpMIPSMOVWconst {
  4710  			break
  4711  		}
  4712  		d := auxIntToInt32(v_0.AuxInt)
  4713  		v.reset(OpMIPSMOVWconst)
  4714  		v.AuxInt = int32ToAuxInt(c ^ d)
  4715  		return true
  4716  	}
  4717  	// match: (XORconst [c] (XORconst [d] x))
  4718  	// result: (XORconst [c^d] x)
  4719  	for {
  4720  		c := auxIntToInt32(v.AuxInt)
  4721  		if v_0.Op != OpMIPSXORconst {
  4722  			break
  4723  		}
  4724  		d := auxIntToInt32(v_0.AuxInt)
  4725  		x := v_0.Args[0]
  4726  		v.reset(OpMIPSXORconst)
  4727  		v.AuxInt = int32ToAuxInt(c ^ d)
  4728  		v.AddArg(x)
  4729  		return true
  4730  	}
  4731  	return false
  4732  }
  4733  func rewriteValueMIPS_OpMod16(v *Value) bool {
  4734  	v_1 := v.Args[1]
  4735  	v_0 := v.Args[0]
  4736  	b := v.Block
  4737  	typ := &b.Func.Config.Types
  4738  	// match: (Mod16 x y)
  4739  	// result: (Select0 (DIV (SignExt16to32 x) (SignExt16to32 y)))
  4740  	for {
  4741  		x := v_0
  4742  		y := v_1
  4743  		v.reset(OpSelect0)
  4744  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  4745  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4746  		v1.AddArg(x)
  4747  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4748  		v2.AddArg(y)
  4749  		v0.AddArg2(v1, v2)
  4750  		v.AddArg(v0)
  4751  		return true
  4752  	}
  4753  }
  4754  func rewriteValueMIPS_OpMod16u(v *Value) bool {
  4755  	v_1 := v.Args[1]
  4756  	v_0 := v.Args[0]
  4757  	b := v.Block
  4758  	typ := &b.Func.Config.Types
  4759  	// match: (Mod16u x y)
  4760  	// result: (Select0 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  4761  	for {
  4762  		x := v_0
  4763  		y := v_1
  4764  		v.reset(OpSelect0)
  4765  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  4766  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4767  		v1.AddArg(x)
  4768  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4769  		v2.AddArg(y)
  4770  		v0.AddArg2(v1, v2)
  4771  		v.AddArg(v0)
  4772  		return true
  4773  	}
  4774  }
  4775  func rewriteValueMIPS_OpMod32(v *Value) bool {
  4776  	v_1 := v.Args[1]
  4777  	v_0 := v.Args[0]
  4778  	b := v.Block
  4779  	typ := &b.Func.Config.Types
  4780  	// match: (Mod32 x y)
  4781  	// result: (Select0 (DIV x y))
  4782  	for {
  4783  		x := v_0
  4784  		y := v_1
  4785  		v.reset(OpSelect0)
  4786  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  4787  		v0.AddArg2(x, y)
  4788  		v.AddArg(v0)
  4789  		return true
  4790  	}
  4791  }
  4792  func rewriteValueMIPS_OpMod32u(v *Value) bool {
  4793  	v_1 := v.Args[1]
  4794  	v_0 := v.Args[0]
  4795  	b := v.Block
  4796  	typ := &b.Func.Config.Types
  4797  	// match: (Mod32u x y)
  4798  	// result: (Select0 (DIVU x y))
  4799  	for {
  4800  		x := v_0
  4801  		y := v_1
  4802  		v.reset(OpSelect0)
  4803  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  4804  		v0.AddArg2(x, y)
  4805  		v.AddArg(v0)
  4806  		return true
  4807  	}
  4808  }
  4809  func rewriteValueMIPS_OpMod8(v *Value) bool {
  4810  	v_1 := v.Args[1]
  4811  	v_0 := v.Args[0]
  4812  	b := v.Block
  4813  	typ := &b.Func.Config.Types
  4814  	// match: (Mod8 x y)
  4815  	// result: (Select0 (DIV (SignExt8to32 x) (SignExt8to32 y)))
  4816  	for {
  4817  		x := v_0
  4818  		y := v_1
  4819  		v.reset(OpSelect0)
  4820  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  4821  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4822  		v1.AddArg(x)
  4823  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  4824  		v2.AddArg(y)
  4825  		v0.AddArg2(v1, v2)
  4826  		v.AddArg(v0)
  4827  		return true
  4828  	}
  4829  }
  4830  func rewriteValueMIPS_OpMod8u(v *Value) bool {
  4831  	v_1 := v.Args[1]
  4832  	v_0 := v.Args[0]
  4833  	b := v.Block
  4834  	typ := &b.Func.Config.Types
  4835  	// match: (Mod8u x y)
  4836  	// result: (Select0 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  4837  	for {
  4838  		x := v_0
  4839  		y := v_1
  4840  		v.reset(OpSelect0)
  4841  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  4842  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4843  		v1.AddArg(x)
  4844  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  4845  		v2.AddArg(y)
  4846  		v0.AddArg2(v1, v2)
  4847  		v.AddArg(v0)
  4848  		return true
  4849  	}
  4850  }
  4851  func rewriteValueMIPS_OpMove(v *Value) bool {
  4852  	v_2 := v.Args[2]
  4853  	v_1 := v.Args[1]
  4854  	v_0 := v.Args[0]
  4855  	b := v.Block
  4856  	config := b.Func.Config
  4857  	typ := &b.Func.Config.Types
  4858  	// match: (Move [0] _ _ mem)
  4859  	// result: mem
  4860  	for {
  4861  		if auxIntToInt64(v.AuxInt) != 0 {
  4862  			break
  4863  		}
  4864  		mem := v_2
  4865  		v.copyOf(mem)
  4866  		return true
  4867  	}
  4868  	// match: (Move [1] dst src mem)
  4869  	// result: (MOVBstore dst (MOVBUload src mem) mem)
  4870  	for {
  4871  		if auxIntToInt64(v.AuxInt) != 1 {
  4872  			break
  4873  		}
  4874  		dst := v_0
  4875  		src := v_1
  4876  		mem := v_2
  4877  		v.reset(OpMIPSMOVBstore)
  4878  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4879  		v0.AddArg2(src, mem)
  4880  		v.AddArg3(dst, v0, mem)
  4881  		return true
  4882  	}
  4883  	// match: (Move [2] {t} dst src mem)
  4884  	// cond: t.Alignment()%2 == 0
  4885  	// result: (MOVHstore dst (MOVHUload src mem) mem)
  4886  	for {
  4887  		if auxIntToInt64(v.AuxInt) != 2 {
  4888  			break
  4889  		}
  4890  		t := auxToType(v.Aux)
  4891  		dst := v_0
  4892  		src := v_1
  4893  		mem := v_2
  4894  		if !(t.Alignment()%2 == 0) {
  4895  			break
  4896  		}
  4897  		v.reset(OpMIPSMOVHstore)
  4898  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  4899  		v0.AddArg2(src, mem)
  4900  		v.AddArg3(dst, v0, mem)
  4901  		return true
  4902  	}
  4903  	// match: (Move [2] dst src mem)
  4904  	// result: (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))
  4905  	for {
  4906  		if auxIntToInt64(v.AuxInt) != 2 {
  4907  			break
  4908  		}
  4909  		dst := v_0
  4910  		src := v_1
  4911  		mem := v_2
  4912  		v.reset(OpMIPSMOVBstore)
  4913  		v.AuxInt = int32ToAuxInt(1)
  4914  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4915  		v0.AuxInt = int32ToAuxInt(1)
  4916  		v0.AddArg2(src, mem)
  4917  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  4918  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4919  		v2.AddArg2(src, mem)
  4920  		v1.AddArg3(dst, v2, mem)
  4921  		v.AddArg3(dst, v0, v1)
  4922  		return true
  4923  	}
  4924  	// match: (Move [4] {t} dst src mem)
  4925  	// cond: t.Alignment()%4 == 0
  4926  	// result: (MOVWstore dst (MOVWload src mem) mem)
  4927  	for {
  4928  		if auxIntToInt64(v.AuxInt) != 4 {
  4929  			break
  4930  		}
  4931  		t := auxToType(v.Aux)
  4932  		dst := v_0
  4933  		src := v_1
  4934  		mem := v_2
  4935  		if !(t.Alignment()%4 == 0) {
  4936  			break
  4937  		}
  4938  		v.reset(OpMIPSMOVWstore)
  4939  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  4940  		v0.AddArg2(src, mem)
  4941  		v.AddArg3(dst, v0, mem)
  4942  		return true
  4943  	}
  4944  	// match: (Move [4] {t} dst src mem)
  4945  	// cond: t.Alignment()%2 == 0
  4946  	// result: (MOVHstore [2] dst (MOVHUload [2] src mem) (MOVHstore dst (MOVHUload src mem) mem))
  4947  	for {
  4948  		if auxIntToInt64(v.AuxInt) != 4 {
  4949  			break
  4950  		}
  4951  		t := auxToType(v.Aux)
  4952  		dst := v_0
  4953  		src := v_1
  4954  		mem := v_2
  4955  		if !(t.Alignment()%2 == 0) {
  4956  			break
  4957  		}
  4958  		v.reset(OpMIPSMOVHstore)
  4959  		v.AuxInt = int32ToAuxInt(2)
  4960  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  4961  		v0.AuxInt = int32ToAuxInt(2)
  4962  		v0.AddArg2(src, mem)
  4963  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  4964  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  4965  		v2.AddArg2(src, mem)
  4966  		v1.AddArg3(dst, v2, mem)
  4967  		v.AddArg3(dst, v0, v1)
  4968  		return true
  4969  	}
  4970  	// match: (Move [4] dst src mem)
  4971  	// result: (MOVBstore [3] dst (MOVBUload [3] src mem) (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))))
  4972  	for {
  4973  		if auxIntToInt64(v.AuxInt) != 4 {
  4974  			break
  4975  		}
  4976  		dst := v_0
  4977  		src := v_1
  4978  		mem := v_2
  4979  		v.reset(OpMIPSMOVBstore)
  4980  		v.AuxInt = int32ToAuxInt(3)
  4981  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4982  		v0.AuxInt = int32ToAuxInt(3)
  4983  		v0.AddArg2(src, mem)
  4984  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  4985  		v1.AuxInt = int32ToAuxInt(2)
  4986  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4987  		v2.AuxInt = int32ToAuxInt(2)
  4988  		v2.AddArg2(src, mem)
  4989  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  4990  		v3.AuxInt = int32ToAuxInt(1)
  4991  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4992  		v4.AuxInt = int32ToAuxInt(1)
  4993  		v4.AddArg2(src, mem)
  4994  		v5 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  4995  		v6 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  4996  		v6.AddArg2(src, mem)
  4997  		v5.AddArg3(dst, v6, mem)
  4998  		v3.AddArg3(dst, v4, v5)
  4999  		v1.AddArg3(dst, v2, v3)
  5000  		v.AddArg3(dst, v0, v1)
  5001  		return true
  5002  	}
  5003  	// match: (Move [3] dst src mem)
  5004  	// result: (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem)))
  5005  	for {
  5006  		if auxIntToInt64(v.AuxInt) != 3 {
  5007  			break
  5008  		}
  5009  		dst := v_0
  5010  		src := v_1
  5011  		mem := v_2
  5012  		v.reset(OpMIPSMOVBstore)
  5013  		v.AuxInt = int32ToAuxInt(2)
  5014  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5015  		v0.AuxInt = int32ToAuxInt(2)
  5016  		v0.AddArg2(src, mem)
  5017  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5018  		v1.AuxInt = int32ToAuxInt(1)
  5019  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5020  		v2.AuxInt = int32ToAuxInt(1)
  5021  		v2.AddArg2(src, mem)
  5022  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5023  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5024  		v4.AddArg2(src, mem)
  5025  		v3.AddArg3(dst, v4, mem)
  5026  		v1.AddArg3(dst, v2, v3)
  5027  		v.AddArg3(dst, v0, v1)
  5028  		return true
  5029  	}
  5030  	// match: (Move [8] {t} dst src mem)
  5031  	// cond: t.Alignment()%4 == 0
  5032  	// result: (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))
  5033  	for {
  5034  		if auxIntToInt64(v.AuxInt) != 8 {
  5035  			break
  5036  		}
  5037  		t := auxToType(v.Aux)
  5038  		dst := v_0
  5039  		src := v_1
  5040  		mem := v_2
  5041  		if !(t.Alignment()%4 == 0) {
  5042  			break
  5043  		}
  5044  		v.reset(OpMIPSMOVWstore)
  5045  		v.AuxInt = int32ToAuxInt(4)
  5046  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5047  		v0.AuxInt = int32ToAuxInt(4)
  5048  		v0.AddArg2(src, mem)
  5049  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5050  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5051  		v2.AddArg2(src, mem)
  5052  		v1.AddArg3(dst, v2, mem)
  5053  		v.AddArg3(dst, v0, v1)
  5054  		return true
  5055  	}
  5056  	// match: (Move [8] {t} dst src mem)
  5057  	// cond: t.Alignment()%2 == 0
  5058  	// result: (MOVHstore [6] dst (MOVHload [6] src mem) (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))))
  5059  	for {
  5060  		if auxIntToInt64(v.AuxInt) != 8 {
  5061  			break
  5062  		}
  5063  		t := auxToType(v.Aux)
  5064  		dst := v_0
  5065  		src := v_1
  5066  		mem := v_2
  5067  		if !(t.Alignment()%2 == 0) {
  5068  			break
  5069  		}
  5070  		v.reset(OpMIPSMOVHstore)
  5071  		v.AuxInt = int32ToAuxInt(6)
  5072  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5073  		v0.AuxInt = int32ToAuxInt(6)
  5074  		v0.AddArg2(src, mem)
  5075  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5076  		v1.AuxInt = int32ToAuxInt(4)
  5077  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5078  		v2.AuxInt = int32ToAuxInt(4)
  5079  		v2.AddArg2(src, mem)
  5080  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5081  		v3.AuxInt = int32ToAuxInt(2)
  5082  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5083  		v4.AuxInt = int32ToAuxInt(2)
  5084  		v4.AddArg2(src, mem)
  5085  		v5 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5086  		v6 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5087  		v6.AddArg2(src, mem)
  5088  		v5.AddArg3(dst, v6, mem)
  5089  		v3.AddArg3(dst, v4, v5)
  5090  		v1.AddArg3(dst, v2, v3)
  5091  		v.AddArg3(dst, v0, v1)
  5092  		return true
  5093  	}
  5094  	// match: (Move [6] {t} dst src mem)
  5095  	// cond: t.Alignment()%2 == 0
  5096  	// result: (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem)))
  5097  	for {
  5098  		if auxIntToInt64(v.AuxInt) != 6 {
  5099  			break
  5100  		}
  5101  		t := auxToType(v.Aux)
  5102  		dst := v_0
  5103  		src := v_1
  5104  		mem := v_2
  5105  		if !(t.Alignment()%2 == 0) {
  5106  			break
  5107  		}
  5108  		v.reset(OpMIPSMOVHstore)
  5109  		v.AuxInt = int32ToAuxInt(4)
  5110  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5111  		v0.AuxInt = int32ToAuxInt(4)
  5112  		v0.AddArg2(src, mem)
  5113  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5114  		v1.AuxInt = int32ToAuxInt(2)
  5115  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5116  		v2.AuxInt = int32ToAuxInt(2)
  5117  		v2.AddArg2(src, mem)
  5118  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5119  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5120  		v4.AddArg2(src, mem)
  5121  		v3.AddArg3(dst, v4, mem)
  5122  		v1.AddArg3(dst, v2, v3)
  5123  		v.AddArg3(dst, v0, v1)
  5124  		return true
  5125  	}
  5126  	// match: (Move [12] {t} dst src mem)
  5127  	// cond: t.Alignment()%4 == 0
  5128  	// result: (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem)))
  5129  	for {
  5130  		if auxIntToInt64(v.AuxInt) != 12 {
  5131  			break
  5132  		}
  5133  		t := auxToType(v.Aux)
  5134  		dst := v_0
  5135  		src := v_1
  5136  		mem := v_2
  5137  		if !(t.Alignment()%4 == 0) {
  5138  			break
  5139  		}
  5140  		v.reset(OpMIPSMOVWstore)
  5141  		v.AuxInt = int32ToAuxInt(8)
  5142  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5143  		v0.AuxInt = int32ToAuxInt(8)
  5144  		v0.AddArg2(src, mem)
  5145  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5146  		v1.AuxInt = int32ToAuxInt(4)
  5147  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5148  		v2.AuxInt = int32ToAuxInt(4)
  5149  		v2.AddArg2(src, mem)
  5150  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5151  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5152  		v4.AddArg2(src, mem)
  5153  		v3.AddArg3(dst, v4, mem)
  5154  		v1.AddArg3(dst, v2, v3)
  5155  		v.AddArg3(dst, v0, v1)
  5156  		return true
  5157  	}
  5158  	// match: (Move [16] {t} dst src mem)
  5159  	// cond: t.Alignment()%4 == 0
  5160  	// result: (MOVWstore [12] dst (MOVWload [12] src mem) (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))))
  5161  	for {
  5162  		if auxIntToInt64(v.AuxInt) != 16 {
  5163  			break
  5164  		}
  5165  		t := auxToType(v.Aux)
  5166  		dst := v_0
  5167  		src := v_1
  5168  		mem := v_2
  5169  		if !(t.Alignment()%4 == 0) {
  5170  			break
  5171  		}
  5172  		v.reset(OpMIPSMOVWstore)
  5173  		v.AuxInt = int32ToAuxInt(12)
  5174  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5175  		v0.AuxInt = int32ToAuxInt(12)
  5176  		v0.AddArg2(src, mem)
  5177  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5178  		v1.AuxInt = int32ToAuxInt(8)
  5179  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5180  		v2.AuxInt = int32ToAuxInt(8)
  5181  		v2.AddArg2(src, mem)
  5182  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5183  		v3.AuxInt = int32ToAuxInt(4)
  5184  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5185  		v4.AuxInt = int32ToAuxInt(4)
  5186  		v4.AddArg2(src, mem)
  5187  		v5 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5188  		v6 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5189  		v6.AddArg2(src, mem)
  5190  		v5.AddArg3(dst, v6, mem)
  5191  		v3.AddArg3(dst, v4, v5)
  5192  		v1.AddArg3(dst, v2, v3)
  5193  		v.AddArg3(dst, v0, v1)
  5194  		return true
  5195  	}
  5196  	// match: (Move [s] {t} dst src mem)
  5197  	// cond: (s > 16 && logLargeCopy(v, s) || t.Alignment()%4 != 0)
  5198  	// result: (LoweredMove [int32(t.Alignment())] dst src (ADDconst <src.Type> src [int32(s-moveSize(t.Alignment(), config))]) mem)
  5199  	for {
  5200  		s := auxIntToInt64(v.AuxInt)
  5201  		t := auxToType(v.Aux)
  5202  		dst := v_0
  5203  		src := v_1
  5204  		mem := v_2
  5205  		if !(s > 16 && logLargeCopy(v, s) || t.Alignment()%4 != 0) {
  5206  			break
  5207  		}
  5208  		v.reset(OpMIPSLoweredMove)
  5209  		v.AuxInt = int32ToAuxInt(int32(t.Alignment()))
  5210  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, src.Type)
  5211  		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
  5212  		v0.AddArg(src)
  5213  		v.AddArg4(dst, src, v0, mem)
  5214  		return true
  5215  	}
  5216  	return false
  5217  }
  5218  func rewriteValueMIPS_OpNeq16(v *Value) bool {
  5219  	v_1 := v.Args[1]
  5220  	v_0 := v.Args[0]
  5221  	b := v.Block
  5222  	typ := &b.Func.Config.Types
  5223  	// match: (Neq16 x y)
  5224  	// result: (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)) (MOVWconst [0]))
  5225  	for {
  5226  		x := v_0
  5227  		y := v_1
  5228  		v.reset(OpMIPSSGTU)
  5229  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5230  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5231  		v1.AddArg(x)
  5232  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5233  		v2.AddArg(y)
  5234  		v0.AddArg2(v1, v2)
  5235  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5236  		v3.AuxInt = int32ToAuxInt(0)
  5237  		v.AddArg2(v0, v3)
  5238  		return true
  5239  	}
  5240  }
  5241  func rewriteValueMIPS_OpNeq32(v *Value) bool {
  5242  	v_1 := v.Args[1]
  5243  	v_0 := v.Args[0]
  5244  	b := v.Block
  5245  	typ := &b.Func.Config.Types
  5246  	// match: (Neq32 x y)
  5247  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  5248  	for {
  5249  		x := v_0
  5250  		y := v_1
  5251  		v.reset(OpMIPSSGTU)
  5252  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5253  		v0.AddArg2(x, y)
  5254  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5255  		v1.AuxInt = int32ToAuxInt(0)
  5256  		v.AddArg2(v0, v1)
  5257  		return true
  5258  	}
  5259  }
  5260  func rewriteValueMIPS_OpNeq32F(v *Value) bool {
  5261  	v_1 := v.Args[1]
  5262  	v_0 := v.Args[0]
  5263  	b := v.Block
  5264  	// match: (Neq32F x y)
  5265  	// result: (FPFlagFalse (CMPEQF x y))
  5266  	for {
  5267  		x := v_0
  5268  		y := v_1
  5269  		v.reset(OpMIPSFPFlagFalse)
  5270  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
  5271  		v0.AddArg2(x, y)
  5272  		v.AddArg(v0)
  5273  		return true
  5274  	}
  5275  }
  5276  func rewriteValueMIPS_OpNeq64F(v *Value) bool {
  5277  	v_1 := v.Args[1]
  5278  	v_0 := v.Args[0]
  5279  	b := v.Block
  5280  	// match: (Neq64F x y)
  5281  	// result: (FPFlagFalse (CMPEQD x y))
  5282  	for {
  5283  		x := v_0
  5284  		y := v_1
  5285  		v.reset(OpMIPSFPFlagFalse)
  5286  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
  5287  		v0.AddArg2(x, y)
  5288  		v.AddArg(v0)
  5289  		return true
  5290  	}
  5291  }
  5292  func rewriteValueMIPS_OpNeq8(v *Value) bool {
  5293  	v_1 := v.Args[1]
  5294  	v_0 := v.Args[0]
  5295  	b := v.Block
  5296  	typ := &b.Func.Config.Types
  5297  	// match: (Neq8 x y)
  5298  	// result: (SGTU (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)) (MOVWconst [0]))
  5299  	for {
  5300  		x := v_0
  5301  		y := v_1
  5302  		v.reset(OpMIPSSGTU)
  5303  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5304  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5305  		v1.AddArg(x)
  5306  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5307  		v2.AddArg(y)
  5308  		v0.AddArg2(v1, v2)
  5309  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5310  		v3.AuxInt = int32ToAuxInt(0)
  5311  		v.AddArg2(v0, v3)
  5312  		return true
  5313  	}
  5314  }
  5315  func rewriteValueMIPS_OpNeqPtr(v *Value) bool {
  5316  	v_1 := v.Args[1]
  5317  	v_0 := v.Args[0]
  5318  	b := v.Block
  5319  	typ := &b.Func.Config.Types
  5320  	// match: (NeqPtr x y)
  5321  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  5322  	for {
  5323  		x := v_0
  5324  		y := v_1
  5325  		v.reset(OpMIPSSGTU)
  5326  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5327  		v0.AddArg2(x, y)
  5328  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5329  		v1.AuxInt = int32ToAuxInt(0)
  5330  		v.AddArg2(v0, v1)
  5331  		return true
  5332  	}
  5333  }
  5334  func rewriteValueMIPS_OpNot(v *Value) bool {
  5335  	v_0 := v.Args[0]
  5336  	// match: (Not x)
  5337  	// result: (XORconst [1] x)
  5338  	for {
  5339  		x := v_0
  5340  		v.reset(OpMIPSXORconst)
  5341  		v.AuxInt = int32ToAuxInt(1)
  5342  		v.AddArg(x)
  5343  		return true
  5344  	}
  5345  }
  5346  func rewriteValueMIPS_OpOffPtr(v *Value) bool {
  5347  	v_0 := v.Args[0]
  5348  	// match: (OffPtr [off] ptr:(SP))
  5349  	// result: (MOVWaddr [int32(off)] ptr)
  5350  	for {
  5351  		off := auxIntToInt64(v.AuxInt)
  5352  		ptr := v_0
  5353  		if ptr.Op != OpSP {
  5354  			break
  5355  		}
  5356  		v.reset(OpMIPSMOVWaddr)
  5357  		v.AuxInt = int32ToAuxInt(int32(off))
  5358  		v.AddArg(ptr)
  5359  		return true
  5360  	}
  5361  	// match: (OffPtr [off] ptr)
  5362  	// result: (ADDconst [int32(off)] ptr)
  5363  	for {
  5364  		off := auxIntToInt64(v.AuxInt)
  5365  		ptr := v_0
  5366  		v.reset(OpMIPSADDconst)
  5367  		v.AuxInt = int32ToAuxInt(int32(off))
  5368  		v.AddArg(ptr)
  5369  		return true
  5370  	}
  5371  }
  5372  func rewriteValueMIPS_OpPanicBounds(v *Value) bool {
  5373  	v_2 := v.Args[2]
  5374  	v_1 := v.Args[1]
  5375  	v_0 := v.Args[0]
  5376  	// match: (PanicBounds [kind] x y mem)
  5377  	// cond: boundsABI(kind) == 0
  5378  	// result: (LoweredPanicBoundsA [kind] x y mem)
  5379  	for {
  5380  		kind := auxIntToInt64(v.AuxInt)
  5381  		x := v_0
  5382  		y := v_1
  5383  		mem := v_2
  5384  		if !(boundsABI(kind) == 0) {
  5385  			break
  5386  		}
  5387  		v.reset(OpMIPSLoweredPanicBoundsA)
  5388  		v.AuxInt = int64ToAuxInt(kind)
  5389  		v.AddArg3(x, y, mem)
  5390  		return true
  5391  	}
  5392  	// match: (PanicBounds [kind] x y mem)
  5393  	// cond: boundsABI(kind) == 1
  5394  	// result: (LoweredPanicBoundsB [kind] x y mem)
  5395  	for {
  5396  		kind := auxIntToInt64(v.AuxInt)
  5397  		x := v_0
  5398  		y := v_1
  5399  		mem := v_2
  5400  		if !(boundsABI(kind) == 1) {
  5401  			break
  5402  		}
  5403  		v.reset(OpMIPSLoweredPanicBoundsB)
  5404  		v.AuxInt = int64ToAuxInt(kind)
  5405  		v.AddArg3(x, y, mem)
  5406  		return true
  5407  	}
  5408  	// match: (PanicBounds [kind] x y mem)
  5409  	// cond: boundsABI(kind) == 2
  5410  	// result: (LoweredPanicBoundsC [kind] x y mem)
  5411  	for {
  5412  		kind := auxIntToInt64(v.AuxInt)
  5413  		x := v_0
  5414  		y := v_1
  5415  		mem := v_2
  5416  		if !(boundsABI(kind) == 2) {
  5417  			break
  5418  		}
  5419  		v.reset(OpMIPSLoweredPanicBoundsC)
  5420  		v.AuxInt = int64ToAuxInt(kind)
  5421  		v.AddArg3(x, y, mem)
  5422  		return true
  5423  	}
  5424  	return false
  5425  }
  5426  func rewriteValueMIPS_OpPanicExtend(v *Value) bool {
  5427  	v_3 := v.Args[3]
  5428  	v_2 := v.Args[2]
  5429  	v_1 := v.Args[1]
  5430  	v_0 := v.Args[0]
  5431  	// match: (PanicExtend [kind] hi lo y mem)
  5432  	// cond: boundsABI(kind) == 0
  5433  	// result: (LoweredPanicExtendA [kind] hi lo y mem)
  5434  	for {
  5435  		kind := auxIntToInt64(v.AuxInt)
  5436  		hi := v_0
  5437  		lo := v_1
  5438  		y := v_2
  5439  		mem := v_3
  5440  		if !(boundsABI(kind) == 0) {
  5441  			break
  5442  		}
  5443  		v.reset(OpMIPSLoweredPanicExtendA)
  5444  		v.AuxInt = int64ToAuxInt(kind)
  5445  		v.AddArg4(hi, lo, y, mem)
  5446  		return true
  5447  	}
  5448  	// match: (PanicExtend [kind] hi lo y mem)
  5449  	// cond: boundsABI(kind) == 1
  5450  	// result: (LoweredPanicExtendB [kind] hi lo y mem)
  5451  	for {
  5452  		kind := auxIntToInt64(v.AuxInt)
  5453  		hi := v_0
  5454  		lo := v_1
  5455  		y := v_2
  5456  		mem := v_3
  5457  		if !(boundsABI(kind) == 1) {
  5458  			break
  5459  		}
  5460  		v.reset(OpMIPSLoweredPanicExtendB)
  5461  		v.AuxInt = int64ToAuxInt(kind)
  5462  		v.AddArg4(hi, lo, y, mem)
  5463  		return true
  5464  	}
  5465  	// match: (PanicExtend [kind] hi lo y mem)
  5466  	// cond: boundsABI(kind) == 2
  5467  	// result: (LoweredPanicExtendC [kind] hi lo y mem)
  5468  	for {
  5469  		kind := auxIntToInt64(v.AuxInt)
  5470  		hi := v_0
  5471  		lo := v_1
  5472  		y := v_2
  5473  		mem := v_3
  5474  		if !(boundsABI(kind) == 2) {
  5475  			break
  5476  		}
  5477  		v.reset(OpMIPSLoweredPanicExtendC)
  5478  		v.AuxInt = int64ToAuxInt(kind)
  5479  		v.AddArg4(hi, lo, y, mem)
  5480  		return true
  5481  	}
  5482  	return false
  5483  }
  5484  func rewriteValueMIPS_OpRotateLeft16(v *Value) bool {
  5485  	v_1 := v.Args[1]
  5486  	v_0 := v.Args[0]
  5487  	b := v.Block
  5488  	typ := &b.Func.Config.Types
  5489  	// match: (RotateLeft16 <t> x (MOVWconst [c]))
  5490  	// result: (Or16 (Lsh16x32 <t> x (MOVWconst [c&15])) (Rsh16Ux32 <t> x (MOVWconst [-c&15])))
  5491  	for {
  5492  		t := v.Type
  5493  		x := v_0
  5494  		if v_1.Op != OpMIPSMOVWconst {
  5495  			break
  5496  		}
  5497  		c := auxIntToInt32(v_1.AuxInt)
  5498  		v.reset(OpOr16)
  5499  		v0 := b.NewValue0(v.Pos, OpLsh16x32, t)
  5500  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5501  		v1.AuxInt = int32ToAuxInt(c & 15)
  5502  		v0.AddArg2(x, v1)
  5503  		v2 := b.NewValue0(v.Pos, OpRsh16Ux32, t)
  5504  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5505  		v3.AuxInt = int32ToAuxInt(-c & 15)
  5506  		v2.AddArg2(x, v3)
  5507  		v.AddArg2(v0, v2)
  5508  		return true
  5509  	}
  5510  	return false
  5511  }
  5512  func rewriteValueMIPS_OpRotateLeft32(v *Value) bool {
  5513  	v_1 := v.Args[1]
  5514  	v_0 := v.Args[0]
  5515  	b := v.Block
  5516  	typ := &b.Func.Config.Types
  5517  	// match: (RotateLeft32 <t> x (MOVWconst [c]))
  5518  	// result: (Or32 (Lsh32x32 <t> x (MOVWconst [c&31])) (Rsh32Ux32 <t> x (MOVWconst [-c&31])))
  5519  	for {
  5520  		t := v.Type
  5521  		x := v_0
  5522  		if v_1.Op != OpMIPSMOVWconst {
  5523  			break
  5524  		}
  5525  		c := auxIntToInt32(v_1.AuxInt)
  5526  		v.reset(OpOr32)
  5527  		v0 := b.NewValue0(v.Pos, OpLsh32x32, t)
  5528  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5529  		v1.AuxInt = int32ToAuxInt(c & 31)
  5530  		v0.AddArg2(x, v1)
  5531  		v2 := b.NewValue0(v.Pos, OpRsh32Ux32, t)
  5532  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5533  		v3.AuxInt = int32ToAuxInt(-c & 31)
  5534  		v2.AddArg2(x, v3)
  5535  		v.AddArg2(v0, v2)
  5536  		return true
  5537  	}
  5538  	return false
  5539  }
  5540  func rewriteValueMIPS_OpRotateLeft64(v *Value) bool {
  5541  	v_1 := v.Args[1]
  5542  	v_0 := v.Args[0]
  5543  	b := v.Block
  5544  	typ := &b.Func.Config.Types
  5545  	// match: (RotateLeft64 <t> x (MOVWconst [c]))
  5546  	// result: (Or64 (Lsh64x32 <t> x (MOVWconst [c&63])) (Rsh64Ux32 <t> x (MOVWconst [-c&63])))
  5547  	for {
  5548  		t := v.Type
  5549  		x := v_0
  5550  		if v_1.Op != OpMIPSMOVWconst {
  5551  			break
  5552  		}
  5553  		c := auxIntToInt32(v_1.AuxInt)
  5554  		v.reset(OpOr64)
  5555  		v0 := b.NewValue0(v.Pos, OpLsh64x32, t)
  5556  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5557  		v1.AuxInt = int32ToAuxInt(c & 63)
  5558  		v0.AddArg2(x, v1)
  5559  		v2 := b.NewValue0(v.Pos, OpRsh64Ux32, t)
  5560  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5561  		v3.AuxInt = int32ToAuxInt(-c & 63)
  5562  		v2.AddArg2(x, v3)
  5563  		v.AddArg2(v0, v2)
  5564  		return true
  5565  	}
  5566  	return false
  5567  }
  5568  func rewriteValueMIPS_OpRotateLeft8(v *Value) bool {
  5569  	v_1 := v.Args[1]
  5570  	v_0 := v.Args[0]
  5571  	b := v.Block
  5572  	typ := &b.Func.Config.Types
  5573  	// match: (RotateLeft8 <t> x (MOVWconst [c]))
  5574  	// result: (Or8 (Lsh8x32 <t> x (MOVWconst [c&7])) (Rsh8Ux32 <t> x (MOVWconst [-c&7])))
  5575  	for {
  5576  		t := v.Type
  5577  		x := v_0
  5578  		if v_1.Op != OpMIPSMOVWconst {
  5579  			break
  5580  		}
  5581  		c := auxIntToInt32(v_1.AuxInt)
  5582  		v.reset(OpOr8)
  5583  		v0 := b.NewValue0(v.Pos, OpLsh8x32, t)
  5584  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5585  		v1.AuxInt = int32ToAuxInt(c & 7)
  5586  		v0.AddArg2(x, v1)
  5587  		v2 := b.NewValue0(v.Pos, OpRsh8Ux32, t)
  5588  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5589  		v3.AuxInt = int32ToAuxInt(-c & 7)
  5590  		v2.AddArg2(x, v3)
  5591  		v.AddArg2(v0, v2)
  5592  		return true
  5593  	}
  5594  	return false
  5595  }
  5596  func rewriteValueMIPS_OpRsh16Ux16(v *Value) bool {
  5597  	v_1 := v.Args[1]
  5598  	v_0 := v.Args[0]
  5599  	b := v.Block
  5600  	typ := &b.Func.Config.Types
  5601  	// match: (Rsh16Ux16 <t> x y)
  5602  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  5603  	for {
  5604  		t := v.Type
  5605  		x := v_0
  5606  		y := v_1
  5607  		v.reset(OpMIPSCMOVZ)
  5608  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5609  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5610  		v1.AddArg(x)
  5611  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5612  		v2.AddArg(y)
  5613  		v0.AddArg2(v1, v2)
  5614  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5615  		v3.AuxInt = int32ToAuxInt(0)
  5616  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5617  		v4.AuxInt = int32ToAuxInt(32)
  5618  		v4.AddArg(v2)
  5619  		v.AddArg3(v0, v3, v4)
  5620  		return true
  5621  	}
  5622  }
  5623  func rewriteValueMIPS_OpRsh16Ux32(v *Value) bool {
  5624  	v_1 := v.Args[1]
  5625  	v_0 := v.Args[0]
  5626  	b := v.Block
  5627  	typ := &b.Func.Config.Types
  5628  	// match: (Rsh16Ux32 <t> x y)
  5629  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  5630  	for {
  5631  		t := v.Type
  5632  		x := v_0
  5633  		y := v_1
  5634  		v.reset(OpMIPSCMOVZ)
  5635  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5636  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5637  		v1.AddArg(x)
  5638  		v0.AddArg2(v1, y)
  5639  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5640  		v2.AuxInt = int32ToAuxInt(0)
  5641  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5642  		v3.AuxInt = int32ToAuxInt(32)
  5643  		v3.AddArg(y)
  5644  		v.AddArg3(v0, v2, v3)
  5645  		return true
  5646  	}
  5647  }
  5648  func rewriteValueMIPS_OpRsh16Ux64(v *Value) bool {
  5649  	v_1 := v.Args[1]
  5650  	v_0 := v.Args[0]
  5651  	b := v.Block
  5652  	typ := &b.Func.Config.Types
  5653  	// match: (Rsh16Ux64 x (Const64 [c]))
  5654  	// cond: uint32(c) < 16
  5655  	// result: (SRLconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
  5656  	for {
  5657  		x := v_0
  5658  		if v_1.Op != OpConst64 {
  5659  			break
  5660  		}
  5661  		c := auxIntToInt64(v_1.AuxInt)
  5662  		if !(uint32(c) < 16) {
  5663  			break
  5664  		}
  5665  		v.reset(OpMIPSSRLconst)
  5666  		v.AuxInt = int32ToAuxInt(int32(c + 16))
  5667  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  5668  		v0.AuxInt = int32ToAuxInt(16)
  5669  		v0.AddArg(x)
  5670  		v.AddArg(v0)
  5671  		return true
  5672  	}
  5673  	// match: (Rsh16Ux64 _ (Const64 [c]))
  5674  	// cond: uint32(c) >= 16
  5675  	// result: (MOVWconst [0])
  5676  	for {
  5677  		if v_1.Op != OpConst64 {
  5678  			break
  5679  		}
  5680  		c := auxIntToInt64(v_1.AuxInt)
  5681  		if !(uint32(c) >= 16) {
  5682  			break
  5683  		}
  5684  		v.reset(OpMIPSMOVWconst)
  5685  		v.AuxInt = int32ToAuxInt(0)
  5686  		return true
  5687  	}
  5688  	return false
  5689  }
  5690  func rewriteValueMIPS_OpRsh16Ux8(v *Value) bool {
  5691  	v_1 := v.Args[1]
  5692  	v_0 := v.Args[0]
  5693  	b := v.Block
  5694  	typ := &b.Func.Config.Types
  5695  	// match: (Rsh16Ux8 <t> x y)
  5696  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  5697  	for {
  5698  		t := v.Type
  5699  		x := v_0
  5700  		y := v_1
  5701  		v.reset(OpMIPSCMOVZ)
  5702  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5703  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5704  		v1.AddArg(x)
  5705  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5706  		v2.AddArg(y)
  5707  		v0.AddArg2(v1, v2)
  5708  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5709  		v3.AuxInt = int32ToAuxInt(0)
  5710  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5711  		v4.AuxInt = int32ToAuxInt(32)
  5712  		v4.AddArg(v2)
  5713  		v.AddArg3(v0, v3, v4)
  5714  		return true
  5715  	}
  5716  }
  5717  func rewriteValueMIPS_OpRsh16x16(v *Value) bool {
  5718  	v_1 := v.Args[1]
  5719  	v_0 := v.Args[0]
  5720  	b := v.Block
  5721  	typ := &b.Func.Config.Types
  5722  	// match: (Rsh16x16 x y)
  5723  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  5724  	for {
  5725  		x := v_0
  5726  		y := v_1
  5727  		v.reset(OpMIPSSRA)
  5728  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5729  		v0.AddArg(x)
  5730  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5731  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5732  		v2.AddArg(y)
  5733  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5734  		v3.AuxInt = int32ToAuxInt(31)
  5735  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5736  		v4.AuxInt = int32ToAuxInt(32)
  5737  		v4.AddArg(v2)
  5738  		v1.AddArg3(v2, v3, v4)
  5739  		v.AddArg2(v0, v1)
  5740  		return true
  5741  	}
  5742  }
  5743  func rewriteValueMIPS_OpRsh16x32(v *Value) bool {
  5744  	v_1 := v.Args[1]
  5745  	v_0 := v.Args[0]
  5746  	b := v.Block
  5747  	typ := &b.Func.Config.Types
  5748  	// match: (Rsh16x32 x y)
  5749  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  5750  	for {
  5751  		x := v_0
  5752  		y := v_1
  5753  		v.reset(OpMIPSSRA)
  5754  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5755  		v0.AddArg(x)
  5756  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5757  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5758  		v2.AuxInt = int32ToAuxInt(31)
  5759  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5760  		v3.AuxInt = int32ToAuxInt(32)
  5761  		v3.AddArg(y)
  5762  		v1.AddArg3(y, v2, v3)
  5763  		v.AddArg2(v0, v1)
  5764  		return true
  5765  	}
  5766  }
  5767  func rewriteValueMIPS_OpRsh16x64(v *Value) bool {
  5768  	v_1 := v.Args[1]
  5769  	v_0 := v.Args[0]
  5770  	b := v.Block
  5771  	typ := &b.Func.Config.Types
  5772  	// match: (Rsh16x64 x (Const64 [c]))
  5773  	// cond: uint32(c) < 16
  5774  	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
  5775  	for {
  5776  		x := v_0
  5777  		if v_1.Op != OpConst64 {
  5778  			break
  5779  		}
  5780  		c := auxIntToInt64(v_1.AuxInt)
  5781  		if !(uint32(c) < 16) {
  5782  			break
  5783  		}
  5784  		v.reset(OpMIPSSRAconst)
  5785  		v.AuxInt = int32ToAuxInt(int32(c + 16))
  5786  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  5787  		v0.AuxInt = int32ToAuxInt(16)
  5788  		v0.AddArg(x)
  5789  		v.AddArg(v0)
  5790  		return true
  5791  	}
  5792  	// match: (Rsh16x64 x (Const64 [c]))
  5793  	// cond: uint32(c) >= 16
  5794  	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [31])
  5795  	for {
  5796  		x := v_0
  5797  		if v_1.Op != OpConst64 {
  5798  			break
  5799  		}
  5800  		c := auxIntToInt64(v_1.AuxInt)
  5801  		if !(uint32(c) >= 16) {
  5802  			break
  5803  		}
  5804  		v.reset(OpMIPSSRAconst)
  5805  		v.AuxInt = int32ToAuxInt(31)
  5806  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  5807  		v0.AuxInt = int32ToAuxInt(16)
  5808  		v0.AddArg(x)
  5809  		v.AddArg(v0)
  5810  		return true
  5811  	}
  5812  	return false
  5813  }
  5814  func rewriteValueMIPS_OpRsh16x8(v *Value) bool {
  5815  	v_1 := v.Args[1]
  5816  	v_0 := v.Args[0]
  5817  	b := v.Block
  5818  	typ := &b.Func.Config.Types
  5819  	// match: (Rsh16x8 x y)
  5820  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  5821  	for {
  5822  		x := v_0
  5823  		y := v_1
  5824  		v.reset(OpMIPSSRA)
  5825  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5826  		v0.AddArg(x)
  5827  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5828  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5829  		v2.AddArg(y)
  5830  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5831  		v3.AuxInt = int32ToAuxInt(31)
  5832  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5833  		v4.AuxInt = int32ToAuxInt(32)
  5834  		v4.AddArg(v2)
  5835  		v1.AddArg3(v2, v3, v4)
  5836  		v.AddArg2(v0, v1)
  5837  		return true
  5838  	}
  5839  }
  5840  func rewriteValueMIPS_OpRsh32Ux16(v *Value) bool {
  5841  	v_1 := v.Args[1]
  5842  	v_0 := v.Args[0]
  5843  	b := v.Block
  5844  	typ := &b.Func.Config.Types
  5845  	// match: (Rsh32Ux16 <t> x y)
  5846  	// result: (CMOVZ (SRL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  5847  	for {
  5848  		t := v.Type
  5849  		x := v_0
  5850  		y := v_1
  5851  		v.reset(OpMIPSCMOVZ)
  5852  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5853  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5854  		v1.AddArg(y)
  5855  		v0.AddArg2(x, v1)
  5856  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5857  		v2.AuxInt = int32ToAuxInt(0)
  5858  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5859  		v3.AuxInt = int32ToAuxInt(32)
  5860  		v3.AddArg(v1)
  5861  		v.AddArg3(v0, v2, v3)
  5862  		return true
  5863  	}
  5864  }
  5865  func rewriteValueMIPS_OpRsh32Ux32(v *Value) bool {
  5866  	v_1 := v.Args[1]
  5867  	v_0 := v.Args[0]
  5868  	b := v.Block
  5869  	typ := &b.Func.Config.Types
  5870  	// match: (Rsh32Ux32 <t> x y)
  5871  	// result: (CMOVZ (SRL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  5872  	for {
  5873  		t := v.Type
  5874  		x := v_0
  5875  		y := v_1
  5876  		v.reset(OpMIPSCMOVZ)
  5877  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5878  		v0.AddArg2(x, y)
  5879  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5880  		v1.AuxInt = int32ToAuxInt(0)
  5881  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5882  		v2.AuxInt = int32ToAuxInt(32)
  5883  		v2.AddArg(y)
  5884  		v.AddArg3(v0, v1, v2)
  5885  		return true
  5886  	}
  5887  }
  5888  func rewriteValueMIPS_OpRsh32Ux64(v *Value) bool {
  5889  	v_1 := v.Args[1]
  5890  	v_0 := v.Args[0]
  5891  	// match: (Rsh32Ux64 x (Const64 [c]))
  5892  	// cond: uint32(c) < 32
  5893  	// result: (SRLconst x [int32(c)])
  5894  	for {
  5895  		x := v_0
  5896  		if v_1.Op != OpConst64 {
  5897  			break
  5898  		}
  5899  		c := auxIntToInt64(v_1.AuxInt)
  5900  		if !(uint32(c) < 32) {
  5901  			break
  5902  		}
  5903  		v.reset(OpMIPSSRLconst)
  5904  		v.AuxInt = int32ToAuxInt(int32(c))
  5905  		v.AddArg(x)
  5906  		return true
  5907  	}
  5908  	// match: (Rsh32Ux64 _ (Const64 [c]))
  5909  	// cond: uint32(c) >= 32
  5910  	// result: (MOVWconst [0])
  5911  	for {
  5912  		if v_1.Op != OpConst64 {
  5913  			break
  5914  		}
  5915  		c := auxIntToInt64(v_1.AuxInt)
  5916  		if !(uint32(c) >= 32) {
  5917  			break
  5918  		}
  5919  		v.reset(OpMIPSMOVWconst)
  5920  		v.AuxInt = int32ToAuxInt(0)
  5921  		return true
  5922  	}
  5923  	return false
  5924  }
  5925  func rewriteValueMIPS_OpRsh32Ux8(v *Value) bool {
  5926  	v_1 := v.Args[1]
  5927  	v_0 := v.Args[0]
  5928  	b := v.Block
  5929  	typ := &b.Func.Config.Types
  5930  	// match: (Rsh32Ux8 <t> x y)
  5931  	// result: (CMOVZ (SRL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  5932  	for {
  5933  		t := v.Type
  5934  		x := v_0
  5935  		y := v_1
  5936  		v.reset(OpMIPSCMOVZ)
  5937  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5938  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5939  		v1.AddArg(y)
  5940  		v0.AddArg2(x, v1)
  5941  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5942  		v2.AuxInt = int32ToAuxInt(0)
  5943  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5944  		v3.AuxInt = int32ToAuxInt(32)
  5945  		v3.AddArg(v1)
  5946  		v.AddArg3(v0, v2, v3)
  5947  		return true
  5948  	}
  5949  }
  5950  func rewriteValueMIPS_OpRsh32x16(v *Value) bool {
  5951  	v_1 := v.Args[1]
  5952  	v_0 := v.Args[0]
  5953  	b := v.Block
  5954  	typ := &b.Func.Config.Types
  5955  	// match: (Rsh32x16 x y)
  5956  	// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  5957  	for {
  5958  		x := v_0
  5959  		y := v_1
  5960  		v.reset(OpMIPSSRA)
  5961  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5962  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5963  		v1.AddArg(y)
  5964  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5965  		v2.AuxInt = int32ToAuxInt(31)
  5966  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5967  		v3.AuxInt = int32ToAuxInt(32)
  5968  		v3.AddArg(v1)
  5969  		v0.AddArg3(v1, v2, v3)
  5970  		v.AddArg2(x, v0)
  5971  		return true
  5972  	}
  5973  }
  5974  func rewriteValueMIPS_OpRsh32x32(v *Value) bool {
  5975  	v_1 := v.Args[1]
  5976  	v_0 := v.Args[0]
  5977  	b := v.Block
  5978  	typ := &b.Func.Config.Types
  5979  	// match: (Rsh32x32 x y)
  5980  	// result: (SRA x ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  5981  	for {
  5982  		x := v_0
  5983  		y := v_1
  5984  		v.reset(OpMIPSSRA)
  5985  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5986  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5987  		v1.AuxInt = int32ToAuxInt(31)
  5988  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5989  		v2.AuxInt = int32ToAuxInt(32)
  5990  		v2.AddArg(y)
  5991  		v0.AddArg3(y, v1, v2)
  5992  		v.AddArg2(x, v0)
  5993  		return true
  5994  	}
  5995  }
  5996  func rewriteValueMIPS_OpRsh32x64(v *Value) bool {
  5997  	v_1 := v.Args[1]
  5998  	v_0 := v.Args[0]
  5999  	// match: (Rsh32x64 x (Const64 [c]))
  6000  	// cond: uint32(c) < 32
  6001  	// result: (SRAconst x [int32(c)])
  6002  	for {
  6003  		x := v_0
  6004  		if v_1.Op != OpConst64 {
  6005  			break
  6006  		}
  6007  		c := auxIntToInt64(v_1.AuxInt)
  6008  		if !(uint32(c) < 32) {
  6009  			break
  6010  		}
  6011  		v.reset(OpMIPSSRAconst)
  6012  		v.AuxInt = int32ToAuxInt(int32(c))
  6013  		v.AddArg(x)
  6014  		return true
  6015  	}
  6016  	// match: (Rsh32x64 x (Const64 [c]))
  6017  	// cond: uint32(c) >= 32
  6018  	// result: (SRAconst x [31])
  6019  	for {
  6020  		x := v_0
  6021  		if v_1.Op != OpConst64 {
  6022  			break
  6023  		}
  6024  		c := auxIntToInt64(v_1.AuxInt)
  6025  		if !(uint32(c) >= 32) {
  6026  			break
  6027  		}
  6028  		v.reset(OpMIPSSRAconst)
  6029  		v.AuxInt = int32ToAuxInt(31)
  6030  		v.AddArg(x)
  6031  		return true
  6032  	}
  6033  	return false
  6034  }
  6035  func rewriteValueMIPS_OpRsh32x8(v *Value) bool {
  6036  	v_1 := v.Args[1]
  6037  	v_0 := v.Args[0]
  6038  	b := v.Block
  6039  	typ := &b.Func.Config.Types
  6040  	// match: (Rsh32x8 x y)
  6041  	// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6042  	for {
  6043  		x := v_0
  6044  		y := v_1
  6045  		v.reset(OpMIPSSRA)
  6046  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6047  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6048  		v1.AddArg(y)
  6049  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6050  		v2.AuxInt = int32ToAuxInt(31)
  6051  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6052  		v3.AuxInt = int32ToAuxInt(32)
  6053  		v3.AddArg(v1)
  6054  		v0.AddArg3(v1, v2, v3)
  6055  		v.AddArg2(x, v0)
  6056  		return true
  6057  	}
  6058  }
  6059  func rewriteValueMIPS_OpRsh8Ux16(v *Value) bool {
  6060  	v_1 := v.Args[1]
  6061  	v_0 := v.Args[0]
  6062  	b := v.Block
  6063  	typ := &b.Func.Config.Types
  6064  	// match: (Rsh8Ux16 <t> x y)
  6065  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  6066  	for {
  6067  		t := v.Type
  6068  		x := v_0
  6069  		y := v_1
  6070  		v.reset(OpMIPSCMOVZ)
  6071  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6072  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6073  		v1.AddArg(x)
  6074  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6075  		v2.AddArg(y)
  6076  		v0.AddArg2(v1, v2)
  6077  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6078  		v3.AuxInt = int32ToAuxInt(0)
  6079  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6080  		v4.AuxInt = int32ToAuxInt(32)
  6081  		v4.AddArg(v2)
  6082  		v.AddArg3(v0, v3, v4)
  6083  		return true
  6084  	}
  6085  }
  6086  func rewriteValueMIPS_OpRsh8Ux32(v *Value) bool {
  6087  	v_1 := v.Args[1]
  6088  	v_0 := v.Args[0]
  6089  	b := v.Block
  6090  	typ := &b.Func.Config.Types
  6091  	// match: (Rsh8Ux32 <t> x y)
  6092  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  6093  	for {
  6094  		t := v.Type
  6095  		x := v_0
  6096  		y := v_1
  6097  		v.reset(OpMIPSCMOVZ)
  6098  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6099  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6100  		v1.AddArg(x)
  6101  		v0.AddArg2(v1, y)
  6102  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6103  		v2.AuxInt = int32ToAuxInt(0)
  6104  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6105  		v3.AuxInt = int32ToAuxInt(32)
  6106  		v3.AddArg(y)
  6107  		v.AddArg3(v0, v2, v3)
  6108  		return true
  6109  	}
  6110  }
  6111  func rewriteValueMIPS_OpRsh8Ux64(v *Value) bool {
  6112  	v_1 := v.Args[1]
  6113  	v_0 := v.Args[0]
  6114  	b := v.Block
  6115  	typ := &b.Func.Config.Types
  6116  	// match: (Rsh8Ux64 x (Const64 [c]))
  6117  	// cond: uint32(c) < 8
  6118  	// result: (SRLconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
  6119  	for {
  6120  		x := v_0
  6121  		if v_1.Op != OpConst64 {
  6122  			break
  6123  		}
  6124  		c := auxIntToInt64(v_1.AuxInt)
  6125  		if !(uint32(c) < 8) {
  6126  			break
  6127  		}
  6128  		v.reset(OpMIPSSRLconst)
  6129  		v.AuxInt = int32ToAuxInt(int32(c + 24))
  6130  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6131  		v0.AuxInt = int32ToAuxInt(24)
  6132  		v0.AddArg(x)
  6133  		v.AddArg(v0)
  6134  		return true
  6135  	}
  6136  	// match: (Rsh8Ux64 _ (Const64 [c]))
  6137  	// cond: uint32(c) >= 8
  6138  	// result: (MOVWconst [0])
  6139  	for {
  6140  		if v_1.Op != OpConst64 {
  6141  			break
  6142  		}
  6143  		c := auxIntToInt64(v_1.AuxInt)
  6144  		if !(uint32(c) >= 8) {
  6145  			break
  6146  		}
  6147  		v.reset(OpMIPSMOVWconst)
  6148  		v.AuxInt = int32ToAuxInt(0)
  6149  		return true
  6150  	}
  6151  	return false
  6152  }
  6153  func rewriteValueMIPS_OpRsh8Ux8(v *Value) bool {
  6154  	v_1 := v.Args[1]
  6155  	v_0 := v.Args[0]
  6156  	b := v.Block
  6157  	typ := &b.Func.Config.Types
  6158  	// match: (Rsh8Ux8 <t> x y)
  6159  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  6160  	for {
  6161  		t := v.Type
  6162  		x := v_0
  6163  		y := v_1
  6164  		v.reset(OpMIPSCMOVZ)
  6165  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6166  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6167  		v1.AddArg(x)
  6168  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6169  		v2.AddArg(y)
  6170  		v0.AddArg2(v1, v2)
  6171  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6172  		v3.AuxInt = int32ToAuxInt(0)
  6173  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6174  		v4.AuxInt = int32ToAuxInt(32)
  6175  		v4.AddArg(v2)
  6176  		v.AddArg3(v0, v3, v4)
  6177  		return true
  6178  	}
  6179  }
  6180  func rewriteValueMIPS_OpRsh8x16(v *Value) bool {
  6181  	v_1 := v.Args[1]
  6182  	v_0 := v.Args[0]
  6183  	b := v.Block
  6184  	typ := &b.Func.Config.Types
  6185  	// match: (Rsh8x16 x y)
  6186  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  6187  	for {
  6188  		x := v_0
  6189  		y := v_1
  6190  		v.reset(OpMIPSSRA)
  6191  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6192  		v0.AddArg(x)
  6193  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6194  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6195  		v2.AddArg(y)
  6196  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6197  		v3.AuxInt = int32ToAuxInt(31)
  6198  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6199  		v4.AuxInt = int32ToAuxInt(32)
  6200  		v4.AddArg(v2)
  6201  		v1.AddArg3(v2, v3, v4)
  6202  		v.AddArg2(v0, v1)
  6203  		return true
  6204  	}
  6205  }
  6206  func rewriteValueMIPS_OpRsh8x32(v *Value) bool {
  6207  	v_1 := v.Args[1]
  6208  	v_0 := v.Args[0]
  6209  	b := v.Block
  6210  	typ := &b.Func.Config.Types
  6211  	// match: (Rsh8x32 x y)
  6212  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  6213  	for {
  6214  		x := v_0
  6215  		y := v_1
  6216  		v.reset(OpMIPSSRA)
  6217  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6218  		v0.AddArg(x)
  6219  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6220  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6221  		v2.AuxInt = int32ToAuxInt(31)
  6222  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6223  		v3.AuxInt = int32ToAuxInt(32)
  6224  		v3.AddArg(y)
  6225  		v1.AddArg3(y, v2, v3)
  6226  		v.AddArg2(v0, v1)
  6227  		return true
  6228  	}
  6229  }
  6230  func rewriteValueMIPS_OpRsh8x64(v *Value) bool {
  6231  	v_1 := v.Args[1]
  6232  	v_0 := v.Args[0]
  6233  	b := v.Block
  6234  	typ := &b.Func.Config.Types
  6235  	// match: (Rsh8x64 x (Const64 [c]))
  6236  	// cond: uint32(c) < 8
  6237  	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
  6238  	for {
  6239  		x := v_0
  6240  		if v_1.Op != OpConst64 {
  6241  			break
  6242  		}
  6243  		c := auxIntToInt64(v_1.AuxInt)
  6244  		if !(uint32(c) < 8) {
  6245  			break
  6246  		}
  6247  		v.reset(OpMIPSSRAconst)
  6248  		v.AuxInt = int32ToAuxInt(int32(c + 24))
  6249  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6250  		v0.AuxInt = int32ToAuxInt(24)
  6251  		v0.AddArg(x)
  6252  		v.AddArg(v0)
  6253  		return true
  6254  	}
  6255  	// match: (Rsh8x64 x (Const64 [c]))
  6256  	// cond: uint32(c) >= 8
  6257  	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [31])
  6258  	for {
  6259  		x := v_0
  6260  		if v_1.Op != OpConst64 {
  6261  			break
  6262  		}
  6263  		c := auxIntToInt64(v_1.AuxInt)
  6264  		if !(uint32(c) >= 8) {
  6265  			break
  6266  		}
  6267  		v.reset(OpMIPSSRAconst)
  6268  		v.AuxInt = int32ToAuxInt(31)
  6269  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6270  		v0.AuxInt = int32ToAuxInt(24)
  6271  		v0.AddArg(x)
  6272  		v.AddArg(v0)
  6273  		return true
  6274  	}
  6275  	return false
  6276  }
  6277  func rewriteValueMIPS_OpRsh8x8(v *Value) bool {
  6278  	v_1 := v.Args[1]
  6279  	v_0 := v.Args[0]
  6280  	b := v.Block
  6281  	typ := &b.Func.Config.Types
  6282  	// match: (Rsh8x8 x y)
  6283  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6284  	for {
  6285  		x := v_0
  6286  		y := v_1
  6287  		v.reset(OpMIPSSRA)
  6288  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6289  		v0.AddArg(x)
  6290  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6291  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6292  		v2.AddArg(y)
  6293  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6294  		v3.AuxInt = int32ToAuxInt(31)
  6295  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6296  		v4.AuxInt = int32ToAuxInt(32)
  6297  		v4.AddArg(v2)
  6298  		v1.AddArg3(v2, v3, v4)
  6299  		v.AddArg2(v0, v1)
  6300  		return true
  6301  	}
  6302  }
  6303  func rewriteValueMIPS_OpSelect0(v *Value) bool {
  6304  	v_0 := v.Args[0]
  6305  	b := v.Block
  6306  	typ := &b.Func.Config.Types
  6307  	// match: (Select0 (Add32carry <t> x y))
  6308  	// result: (ADD <t.FieldType(0)> x y)
  6309  	for {
  6310  		if v_0.Op != OpAdd32carry {
  6311  			break
  6312  		}
  6313  		t := v_0.Type
  6314  		y := v_0.Args[1]
  6315  		x := v_0.Args[0]
  6316  		v.reset(OpMIPSADD)
  6317  		v.Type = t.FieldType(0)
  6318  		v.AddArg2(x, y)
  6319  		return true
  6320  	}
  6321  	// match: (Select0 (Sub32carry <t> x y))
  6322  	// result: (SUB <t.FieldType(0)> x y)
  6323  	for {
  6324  		if v_0.Op != OpSub32carry {
  6325  			break
  6326  		}
  6327  		t := v_0.Type
  6328  		y := v_0.Args[1]
  6329  		x := v_0.Args[0]
  6330  		v.reset(OpMIPSSUB)
  6331  		v.Type = t.FieldType(0)
  6332  		v.AddArg2(x, y)
  6333  		return true
  6334  	}
  6335  	// match: (Select0 (MULTU (MOVWconst [0]) _ ))
  6336  	// result: (MOVWconst [0])
  6337  	for {
  6338  		if v_0.Op != OpMIPSMULTU {
  6339  			break
  6340  		}
  6341  		v_0_0 := v_0.Args[0]
  6342  		v_0_1 := v_0.Args[1]
  6343  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6344  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 0 {
  6345  				continue
  6346  			}
  6347  			v.reset(OpMIPSMOVWconst)
  6348  			v.AuxInt = int32ToAuxInt(0)
  6349  			return true
  6350  		}
  6351  		break
  6352  	}
  6353  	// match: (Select0 (MULTU (MOVWconst [1]) _ ))
  6354  	// result: (MOVWconst [0])
  6355  	for {
  6356  		if v_0.Op != OpMIPSMULTU {
  6357  			break
  6358  		}
  6359  		v_0_0 := v_0.Args[0]
  6360  		v_0_1 := v_0.Args[1]
  6361  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6362  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 1 {
  6363  				continue
  6364  			}
  6365  			v.reset(OpMIPSMOVWconst)
  6366  			v.AuxInt = int32ToAuxInt(0)
  6367  			return true
  6368  		}
  6369  		break
  6370  	}
  6371  	// match: (Select0 (MULTU (MOVWconst [-1]) x ))
  6372  	// result: (CMOVZ (ADDconst <x.Type> [-1] x) (MOVWconst [0]) x)
  6373  	for {
  6374  		if v_0.Op != OpMIPSMULTU {
  6375  			break
  6376  		}
  6377  		_ = v_0.Args[1]
  6378  		v_0_0 := v_0.Args[0]
  6379  		v_0_1 := v_0.Args[1]
  6380  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6381  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != -1 {
  6382  				continue
  6383  			}
  6384  			x := v_0_1
  6385  			v.reset(OpMIPSCMOVZ)
  6386  			v0 := b.NewValue0(v.Pos, OpMIPSADDconst, x.Type)
  6387  			v0.AuxInt = int32ToAuxInt(-1)
  6388  			v0.AddArg(x)
  6389  			v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6390  			v1.AuxInt = int32ToAuxInt(0)
  6391  			v.AddArg3(v0, v1, x)
  6392  			return true
  6393  		}
  6394  		break
  6395  	}
  6396  	// match: (Select0 (MULTU (MOVWconst [c]) x ))
  6397  	// cond: isPowerOfTwo64(int64(uint32(c)))
  6398  	// result: (SRLconst [int32(32-log2uint32(int64(c)))] x)
  6399  	for {
  6400  		if v_0.Op != OpMIPSMULTU {
  6401  			break
  6402  		}
  6403  		_ = v_0.Args[1]
  6404  		v_0_0 := v_0.Args[0]
  6405  		v_0_1 := v_0.Args[1]
  6406  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6407  			if v_0_0.Op != OpMIPSMOVWconst {
  6408  				continue
  6409  			}
  6410  			c := auxIntToInt32(v_0_0.AuxInt)
  6411  			x := v_0_1
  6412  			if !(isPowerOfTwo64(int64(uint32(c)))) {
  6413  				continue
  6414  			}
  6415  			v.reset(OpMIPSSRLconst)
  6416  			v.AuxInt = int32ToAuxInt(int32(32 - log2uint32(int64(c))))
  6417  			v.AddArg(x)
  6418  			return true
  6419  		}
  6420  		break
  6421  	}
  6422  	// match: (Select0 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  6423  	// result: (MOVWconst [int32((int64(uint32(c))*int64(uint32(d)))>>32)])
  6424  	for {
  6425  		if v_0.Op != OpMIPSMULTU {
  6426  			break
  6427  		}
  6428  		_ = v_0.Args[1]
  6429  		v_0_0 := v_0.Args[0]
  6430  		v_0_1 := v_0.Args[1]
  6431  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6432  			if v_0_0.Op != OpMIPSMOVWconst {
  6433  				continue
  6434  			}
  6435  			c := auxIntToInt32(v_0_0.AuxInt)
  6436  			if v_0_1.Op != OpMIPSMOVWconst {
  6437  				continue
  6438  			}
  6439  			d := auxIntToInt32(v_0_1.AuxInt)
  6440  			v.reset(OpMIPSMOVWconst)
  6441  			v.AuxInt = int32ToAuxInt(int32((int64(uint32(c)) * int64(uint32(d))) >> 32))
  6442  			return true
  6443  		}
  6444  		break
  6445  	}
  6446  	// match: (Select0 (DIV (MOVWconst [c]) (MOVWconst [d])))
  6447  	// cond: d != 0
  6448  	// result: (MOVWconst [c%d])
  6449  	for {
  6450  		if v_0.Op != OpMIPSDIV {
  6451  			break
  6452  		}
  6453  		_ = v_0.Args[1]
  6454  		v_0_0 := v_0.Args[0]
  6455  		if v_0_0.Op != OpMIPSMOVWconst {
  6456  			break
  6457  		}
  6458  		c := auxIntToInt32(v_0_0.AuxInt)
  6459  		v_0_1 := v_0.Args[1]
  6460  		if v_0_1.Op != OpMIPSMOVWconst {
  6461  			break
  6462  		}
  6463  		d := auxIntToInt32(v_0_1.AuxInt)
  6464  		if !(d != 0) {
  6465  			break
  6466  		}
  6467  		v.reset(OpMIPSMOVWconst)
  6468  		v.AuxInt = int32ToAuxInt(c % d)
  6469  		return true
  6470  	}
  6471  	// match: (Select0 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  6472  	// cond: d != 0
  6473  	// result: (MOVWconst [int32(uint32(c)%uint32(d))])
  6474  	for {
  6475  		if v_0.Op != OpMIPSDIVU {
  6476  			break
  6477  		}
  6478  		_ = v_0.Args[1]
  6479  		v_0_0 := v_0.Args[0]
  6480  		if v_0_0.Op != OpMIPSMOVWconst {
  6481  			break
  6482  		}
  6483  		c := auxIntToInt32(v_0_0.AuxInt)
  6484  		v_0_1 := v_0.Args[1]
  6485  		if v_0_1.Op != OpMIPSMOVWconst {
  6486  			break
  6487  		}
  6488  		d := auxIntToInt32(v_0_1.AuxInt)
  6489  		if !(d != 0) {
  6490  			break
  6491  		}
  6492  		v.reset(OpMIPSMOVWconst)
  6493  		v.AuxInt = int32ToAuxInt(int32(uint32(c) % uint32(d)))
  6494  		return true
  6495  	}
  6496  	return false
  6497  }
  6498  func rewriteValueMIPS_OpSelect1(v *Value) bool {
  6499  	v_0 := v.Args[0]
  6500  	b := v.Block
  6501  	typ := &b.Func.Config.Types
  6502  	// match: (Select1 (Add32carry <t> x y))
  6503  	// result: (SGTU <typ.Bool> x (ADD <t.FieldType(0)> x y))
  6504  	for {
  6505  		if v_0.Op != OpAdd32carry {
  6506  			break
  6507  		}
  6508  		t := v_0.Type
  6509  		y := v_0.Args[1]
  6510  		x := v_0.Args[0]
  6511  		v.reset(OpMIPSSGTU)
  6512  		v.Type = typ.Bool
  6513  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t.FieldType(0))
  6514  		v0.AddArg2(x, y)
  6515  		v.AddArg2(x, v0)
  6516  		return true
  6517  	}
  6518  	// match: (Select1 (Sub32carry <t> x y))
  6519  	// result: (SGTU <typ.Bool> (SUB <t.FieldType(0)> x y) x)
  6520  	for {
  6521  		if v_0.Op != OpSub32carry {
  6522  			break
  6523  		}
  6524  		t := v_0.Type
  6525  		y := v_0.Args[1]
  6526  		x := v_0.Args[0]
  6527  		v.reset(OpMIPSSGTU)
  6528  		v.Type = typ.Bool
  6529  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t.FieldType(0))
  6530  		v0.AddArg2(x, y)
  6531  		v.AddArg2(v0, x)
  6532  		return true
  6533  	}
  6534  	// match: (Select1 (MULTU (MOVWconst [0]) _ ))
  6535  	// result: (MOVWconst [0])
  6536  	for {
  6537  		if v_0.Op != OpMIPSMULTU {
  6538  			break
  6539  		}
  6540  		v_0_0 := v_0.Args[0]
  6541  		v_0_1 := v_0.Args[1]
  6542  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6543  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 0 {
  6544  				continue
  6545  			}
  6546  			v.reset(OpMIPSMOVWconst)
  6547  			v.AuxInt = int32ToAuxInt(0)
  6548  			return true
  6549  		}
  6550  		break
  6551  	}
  6552  	// match: (Select1 (MULTU (MOVWconst [1]) x ))
  6553  	// result: x
  6554  	for {
  6555  		if v_0.Op != OpMIPSMULTU {
  6556  			break
  6557  		}
  6558  		_ = v_0.Args[1]
  6559  		v_0_0 := v_0.Args[0]
  6560  		v_0_1 := v_0.Args[1]
  6561  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6562  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 1 {
  6563  				continue
  6564  			}
  6565  			x := v_0_1
  6566  			v.copyOf(x)
  6567  			return true
  6568  		}
  6569  		break
  6570  	}
  6571  	// match: (Select1 (MULTU (MOVWconst [-1]) x ))
  6572  	// result: (NEG <x.Type> x)
  6573  	for {
  6574  		if v_0.Op != OpMIPSMULTU {
  6575  			break
  6576  		}
  6577  		_ = v_0.Args[1]
  6578  		v_0_0 := v_0.Args[0]
  6579  		v_0_1 := v_0.Args[1]
  6580  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6581  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != -1 {
  6582  				continue
  6583  			}
  6584  			x := v_0_1
  6585  			v.reset(OpMIPSNEG)
  6586  			v.Type = x.Type
  6587  			v.AddArg(x)
  6588  			return true
  6589  		}
  6590  		break
  6591  	}
  6592  	// match: (Select1 (MULTU (MOVWconst [c]) x ))
  6593  	// cond: isPowerOfTwo64(int64(uint32(c)))
  6594  	// result: (SLLconst [int32(log2uint32(int64(c)))] x)
  6595  	for {
  6596  		if v_0.Op != OpMIPSMULTU {
  6597  			break
  6598  		}
  6599  		_ = v_0.Args[1]
  6600  		v_0_0 := v_0.Args[0]
  6601  		v_0_1 := v_0.Args[1]
  6602  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6603  			if v_0_0.Op != OpMIPSMOVWconst {
  6604  				continue
  6605  			}
  6606  			c := auxIntToInt32(v_0_0.AuxInt)
  6607  			x := v_0_1
  6608  			if !(isPowerOfTwo64(int64(uint32(c)))) {
  6609  				continue
  6610  			}
  6611  			v.reset(OpMIPSSLLconst)
  6612  			v.AuxInt = int32ToAuxInt(int32(log2uint32(int64(c))))
  6613  			v.AddArg(x)
  6614  			return true
  6615  		}
  6616  		break
  6617  	}
  6618  	// match: (Select1 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  6619  	// result: (MOVWconst [int32(uint32(c)*uint32(d))])
  6620  	for {
  6621  		if v_0.Op != OpMIPSMULTU {
  6622  			break
  6623  		}
  6624  		_ = v_0.Args[1]
  6625  		v_0_0 := v_0.Args[0]
  6626  		v_0_1 := v_0.Args[1]
  6627  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6628  			if v_0_0.Op != OpMIPSMOVWconst {
  6629  				continue
  6630  			}
  6631  			c := auxIntToInt32(v_0_0.AuxInt)
  6632  			if v_0_1.Op != OpMIPSMOVWconst {
  6633  				continue
  6634  			}
  6635  			d := auxIntToInt32(v_0_1.AuxInt)
  6636  			v.reset(OpMIPSMOVWconst)
  6637  			v.AuxInt = int32ToAuxInt(int32(uint32(c) * uint32(d)))
  6638  			return true
  6639  		}
  6640  		break
  6641  	}
  6642  	// match: (Select1 (DIV (MOVWconst [c]) (MOVWconst [d])))
  6643  	// cond: d != 0
  6644  	// result: (MOVWconst [c/d])
  6645  	for {
  6646  		if v_0.Op != OpMIPSDIV {
  6647  			break
  6648  		}
  6649  		_ = v_0.Args[1]
  6650  		v_0_0 := v_0.Args[0]
  6651  		if v_0_0.Op != OpMIPSMOVWconst {
  6652  			break
  6653  		}
  6654  		c := auxIntToInt32(v_0_0.AuxInt)
  6655  		v_0_1 := v_0.Args[1]
  6656  		if v_0_1.Op != OpMIPSMOVWconst {
  6657  			break
  6658  		}
  6659  		d := auxIntToInt32(v_0_1.AuxInt)
  6660  		if !(d != 0) {
  6661  			break
  6662  		}
  6663  		v.reset(OpMIPSMOVWconst)
  6664  		v.AuxInt = int32ToAuxInt(c / d)
  6665  		return true
  6666  	}
  6667  	// match: (Select1 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  6668  	// cond: d != 0
  6669  	// result: (MOVWconst [int32(uint32(c)/uint32(d))])
  6670  	for {
  6671  		if v_0.Op != OpMIPSDIVU {
  6672  			break
  6673  		}
  6674  		_ = v_0.Args[1]
  6675  		v_0_0 := v_0.Args[0]
  6676  		if v_0_0.Op != OpMIPSMOVWconst {
  6677  			break
  6678  		}
  6679  		c := auxIntToInt32(v_0_0.AuxInt)
  6680  		v_0_1 := v_0.Args[1]
  6681  		if v_0_1.Op != OpMIPSMOVWconst {
  6682  			break
  6683  		}
  6684  		d := auxIntToInt32(v_0_1.AuxInt)
  6685  		if !(d != 0) {
  6686  			break
  6687  		}
  6688  		v.reset(OpMIPSMOVWconst)
  6689  		v.AuxInt = int32ToAuxInt(int32(uint32(c) / uint32(d)))
  6690  		return true
  6691  	}
  6692  	return false
  6693  }
  6694  func rewriteValueMIPS_OpSignmask(v *Value) bool {
  6695  	v_0 := v.Args[0]
  6696  	// match: (Signmask x)
  6697  	// result: (SRAconst x [31])
  6698  	for {
  6699  		x := v_0
  6700  		v.reset(OpMIPSSRAconst)
  6701  		v.AuxInt = int32ToAuxInt(31)
  6702  		v.AddArg(x)
  6703  		return true
  6704  	}
  6705  }
  6706  func rewriteValueMIPS_OpSlicemask(v *Value) bool {
  6707  	v_0 := v.Args[0]
  6708  	b := v.Block
  6709  	// match: (Slicemask <t> x)
  6710  	// result: (SRAconst (NEG <t> x) [31])
  6711  	for {
  6712  		t := v.Type
  6713  		x := v_0
  6714  		v.reset(OpMIPSSRAconst)
  6715  		v.AuxInt = int32ToAuxInt(31)
  6716  		v0 := b.NewValue0(v.Pos, OpMIPSNEG, t)
  6717  		v0.AddArg(x)
  6718  		v.AddArg(v0)
  6719  		return true
  6720  	}
  6721  }
  6722  func rewriteValueMIPS_OpStore(v *Value) bool {
  6723  	v_2 := v.Args[2]
  6724  	v_1 := v.Args[1]
  6725  	v_0 := v.Args[0]
  6726  	// match: (Store {t} ptr val mem)
  6727  	// cond: t.Size() == 1
  6728  	// result: (MOVBstore ptr val mem)
  6729  	for {
  6730  		t := auxToType(v.Aux)
  6731  		ptr := v_0
  6732  		val := v_1
  6733  		mem := v_2
  6734  		if !(t.Size() == 1) {
  6735  			break
  6736  		}
  6737  		v.reset(OpMIPSMOVBstore)
  6738  		v.AddArg3(ptr, val, mem)
  6739  		return true
  6740  	}
  6741  	// match: (Store {t} ptr val mem)
  6742  	// cond: t.Size() == 2
  6743  	// result: (MOVHstore ptr val mem)
  6744  	for {
  6745  		t := auxToType(v.Aux)
  6746  		ptr := v_0
  6747  		val := v_1
  6748  		mem := v_2
  6749  		if !(t.Size() == 2) {
  6750  			break
  6751  		}
  6752  		v.reset(OpMIPSMOVHstore)
  6753  		v.AddArg3(ptr, val, mem)
  6754  		return true
  6755  	}
  6756  	// match: (Store {t} ptr val mem)
  6757  	// cond: t.Size() == 4 && !is32BitFloat(val.Type)
  6758  	// result: (MOVWstore ptr val mem)
  6759  	for {
  6760  		t := auxToType(v.Aux)
  6761  		ptr := v_0
  6762  		val := v_1
  6763  		mem := v_2
  6764  		if !(t.Size() == 4 && !is32BitFloat(val.Type)) {
  6765  			break
  6766  		}
  6767  		v.reset(OpMIPSMOVWstore)
  6768  		v.AddArg3(ptr, val, mem)
  6769  		return true
  6770  	}
  6771  	// match: (Store {t} ptr val mem)
  6772  	// cond: t.Size() == 4 && is32BitFloat(val.Type)
  6773  	// result: (MOVFstore ptr val mem)
  6774  	for {
  6775  		t := auxToType(v.Aux)
  6776  		ptr := v_0
  6777  		val := v_1
  6778  		mem := v_2
  6779  		if !(t.Size() == 4 && is32BitFloat(val.Type)) {
  6780  			break
  6781  		}
  6782  		v.reset(OpMIPSMOVFstore)
  6783  		v.AddArg3(ptr, val, mem)
  6784  		return true
  6785  	}
  6786  	// match: (Store {t} ptr val mem)
  6787  	// cond: t.Size() == 8 && is64BitFloat(val.Type)
  6788  	// result: (MOVDstore ptr val mem)
  6789  	for {
  6790  		t := auxToType(v.Aux)
  6791  		ptr := v_0
  6792  		val := v_1
  6793  		mem := v_2
  6794  		if !(t.Size() == 8 && is64BitFloat(val.Type)) {
  6795  			break
  6796  		}
  6797  		v.reset(OpMIPSMOVDstore)
  6798  		v.AddArg3(ptr, val, mem)
  6799  		return true
  6800  	}
  6801  	return false
  6802  }
  6803  func rewriteValueMIPS_OpSub32withcarry(v *Value) bool {
  6804  	v_2 := v.Args[2]
  6805  	v_1 := v.Args[1]
  6806  	v_0 := v.Args[0]
  6807  	b := v.Block
  6808  	// match: (Sub32withcarry <t> x y c)
  6809  	// result: (SUB (SUB <t> x y) c)
  6810  	for {
  6811  		t := v.Type
  6812  		x := v_0
  6813  		y := v_1
  6814  		c := v_2
  6815  		v.reset(OpMIPSSUB)
  6816  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t)
  6817  		v0.AddArg2(x, y)
  6818  		v.AddArg2(v0, c)
  6819  		return true
  6820  	}
  6821  }
  6822  func rewriteValueMIPS_OpZero(v *Value) bool {
  6823  	v_1 := v.Args[1]
  6824  	v_0 := v.Args[0]
  6825  	b := v.Block
  6826  	config := b.Func.Config
  6827  	typ := &b.Func.Config.Types
  6828  	// match: (Zero [0] _ mem)
  6829  	// result: mem
  6830  	for {
  6831  		if auxIntToInt64(v.AuxInt) != 0 {
  6832  			break
  6833  		}
  6834  		mem := v_1
  6835  		v.copyOf(mem)
  6836  		return true
  6837  	}
  6838  	// match: (Zero [1] ptr mem)
  6839  	// result: (MOVBstore ptr (MOVWconst [0]) mem)
  6840  	for {
  6841  		if auxIntToInt64(v.AuxInt) != 1 {
  6842  			break
  6843  		}
  6844  		ptr := v_0
  6845  		mem := v_1
  6846  		v.reset(OpMIPSMOVBstore)
  6847  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6848  		v0.AuxInt = int32ToAuxInt(0)
  6849  		v.AddArg3(ptr, v0, mem)
  6850  		return true
  6851  	}
  6852  	// match: (Zero [2] {t} ptr mem)
  6853  	// cond: t.Alignment()%2 == 0
  6854  	// result: (MOVHstore ptr (MOVWconst [0]) mem)
  6855  	for {
  6856  		if auxIntToInt64(v.AuxInt) != 2 {
  6857  			break
  6858  		}
  6859  		t := auxToType(v.Aux)
  6860  		ptr := v_0
  6861  		mem := v_1
  6862  		if !(t.Alignment()%2 == 0) {
  6863  			break
  6864  		}
  6865  		v.reset(OpMIPSMOVHstore)
  6866  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6867  		v0.AuxInt = int32ToAuxInt(0)
  6868  		v.AddArg3(ptr, v0, mem)
  6869  		return true
  6870  	}
  6871  	// match: (Zero [2] ptr mem)
  6872  	// result: (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))
  6873  	for {
  6874  		if auxIntToInt64(v.AuxInt) != 2 {
  6875  			break
  6876  		}
  6877  		ptr := v_0
  6878  		mem := v_1
  6879  		v.reset(OpMIPSMOVBstore)
  6880  		v.AuxInt = int32ToAuxInt(1)
  6881  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6882  		v0.AuxInt = int32ToAuxInt(0)
  6883  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  6884  		v1.AuxInt = int32ToAuxInt(0)
  6885  		v1.AddArg3(ptr, v0, mem)
  6886  		v.AddArg3(ptr, v0, v1)
  6887  		return true
  6888  	}
  6889  	// match: (Zero [4] {t} ptr mem)
  6890  	// cond: t.Alignment()%4 == 0
  6891  	// result: (MOVWstore ptr (MOVWconst [0]) mem)
  6892  	for {
  6893  		if auxIntToInt64(v.AuxInt) != 4 {
  6894  			break
  6895  		}
  6896  		t := auxToType(v.Aux)
  6897  		ptr := v_0
  6898  		mem := v_1
  6899  		if !(t.Alignment()%4 == 0) {
  6900  			break
  6901  		}
  6902  		v.reset(OpMIPSMOVWstore)
  6903  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6904  		v0.AuxInt = int32ToAuxInt(0)
  6905  		v.AddArg3(ptr, v0, mem)
  6906  		return true
  6907  	}
  6908  	// match: (Zero [4] {t} ptr mem)
  6909  	// cond: t.Alignment()%2 == 0
  6910  	// result: (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem))
  6911  	for {
  6912  		if auxIntToInt64(v.AuxInt) != 4 {
  6913  			break
  6914  		}
  6915  		t := auxToType(v.Aux)
  6916  		ptr := v_0
  6917  		mem := v_1
  6918  		if !(t.Alignment()%2 == 0) {
  6919  			break
  6920  		}
  6921  		v.reset(OpMIPSMOVHstore)
  6922  		v.AuxInt = int32ToAuxInt(2)
  6923  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6924  		v0.AuxInt = int32ToAuxInt(0)
  6925  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  6926  		v1.AuxInt = int32ToAuxInt(0)
  6927  		v1.AddArg3(ptr, v0, mem)
  6928  		v.AddArg3(ptr, v0, v1)
  6929  		return true
  6930  	}
  6931  	// match: (Zero [4] ptr mem)
  6932  	// result: (MOVBstore [3] ptr (MOVWconst [0]) (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))))
  6933  	for {
  6934  		if auxIntToInt64(v.AuxInt) != 4 {
  6935  			break
  6936  		}
  6937  		ptr := v_0
  6938  		mem := v_1
  6939  		v.reset(OpMIPSMOVBstore)
  6940  		v.AuxInt = int32ToAuxInt(3)
  6941  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6942  		v0.AuxInt = int32ToAuxInt(0)
  6943  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  6944  		v1.AuxInt = int32ToAuxInt(2)
  6945  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  6946  		v2.AuxInt = int32ToAuxInt(1)
  6947  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  6948  		v3.AuxInt = int32ToAuxInt(0)
  6949  		v3.AddArg3(ptr, v0, mem)
  6950  		v2.AddArg3(ptr, v0, v3)
  6951  		v1.AddArg3(ptr, v0, v2)
  6952  		v.AddArg3(ptr, v0, v1)
  6953  		return true
  6954  	}
  6955  	// match: (Zero [3] ptr mem)
  6956  	// result: (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem)))
  6957  	for {
  6958  		if auxIntToInt64(v.AuxInt) != 3 {
  6959  			break
  6960  		}
  6961  		ptr := v_0
  6962  		mem := v_1
  6963  		v.reset(OpMIPSMOVBstore)
  6964  		v.AuxInt = int32ToAuxInt(2)
  6965  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6966  		v0.AuxInt = int32ToAuxInt(0)
  6967  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  6968  		v1.AuxInt = int32ToAuxInt(1)
  6969  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  6970  		v2.AuxInt = int32ToAuxInt(0)
  6971  		v2.AddArg3(ptr, v0, mem)
  6972  		v1.AddArg3(ptr, v0, v2)
  6973  		v.AddArg3(ptr, v0, v1)
  6974  		return true
  6975  	}
  6976  	// match: (Zero [6] {t} ptr mem)
  6977  	// cond: t.Alignment()%2 == 0
  6978  	// result: (MOVHstore [4] ptr (MOVWconst [0]) (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem)))
  6979  	for {
  6980  		if auxIntToInt64(v.AuxInt) != 6 {
  6981  			break
  6982  		}
  6983  		t := auxToType(v.Aux)
  6984  		ptr := v_0
  6985  		mem := v_1
  6986  		if !(t.Alignment()%2 == 0) {
  6987  			break
  6988  		}
  6989  		v.reset(OpMIPSMOVHstore)
  6990  		v.AuxInt = int32ToAuxInt(4)
  6991  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6992  		v0.AuxInt = int32ToAuxInt(0)
  6993  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  6994  		v1.AuxInt = int32ToAuxInt(2)
  6995  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  6996  		v2.AuxInt = int32ToAuxInt(0)
  6997  		v2.AddArg3(ptr, v0, mem)
  6998  		v1.AddArg3(ptr, v0, v2)
  6999  		v.AddArg3(ptr, v0, v1)
  7000  		return true
  7001  	}
  7002  	// match: (Zero [8] {t} ptr mem)
  7003  	// cond: t.Alignment()%4 == 0
  7004  	// result: (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem))
  7005  	for {
  7006  		if auxIntToInt64(v.AuxInt) != 8 {
  7007  			break
  7008  		}
  7009  		t := auxToType(v.Aux)
  7010  		ptr := v_0
  7011  		mem := v_1
  7012  		if !(t.Alignment()%4 == 0) {
  7013  			break
  7014  		}
  7015  		v.reset(OpMIPSMOVWstore)
  7016  		v.AuxInt = int32ToAuxInt(4)
  7017  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7018  		v0.AuxInt = int32ToAuxInt(0)
  7019  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7020  		v1.AuxInt = int32ToAuxInt(0)
  7021  		v1.AddArg3(ptr, v0, mem)
  7022  		v.AddArg3(ptr, v0, v1)
  7023  		return true
  7024  	}
  7025  	// match: (Zero [12] {t} ptr mem)
  7026  	// cond: t.Alignment()%4 == 0
  7027  	// result: (MOVWstore [8] ptr (MOVWconst [0]) (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem)))
  7028  	for {
  7029  		if auxIntToInt64(v.AuxInt) != 12 {
  7030  			break
  7031  		}
  7032  		t := auxToType(v.Aux)
  7033  		ptr := v_0
  7034  		mem := v_1
  7035  		if !(t.Alignment()%4 == 0) {
  7036  			break
  7037  		}
  7038  		v.reset(OpMIPSMOVWstore)
  7039  		v.AuxInt = int32ToAuxInt(8)
  7040  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7041  		v0.AuxInt = int32ToAuxInt(0)
  7042  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7043  		v1.AuxInt = int32ToAuxInt(4)
  7044  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7045  		v2.AuxInt = int32ToAuxInt(0)
  7046  		v2.AddArg3(ptr, v0, mem)
  7047  		v1.AddArg3(ptr, v0, v2)
  7048  		v.AddArg3(ptr, v0, v1)
  7049  		return true
  7050  	}
  7051  	// match: (Zero [16] {t} ptr mem)
  7052  	// cond: t.Alignment()%4 == 0
  7053  	// result: (MOVWstore [12] ptr (MOVWconst [0]) (MOVWstore [8] ptr (MOVWconst [0]) (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem))))
  7054  	for {
  7055  		if auxIntToInt64(v.AuxInt) != 16 {
  7056  			break
  7057  		}
  7058  		t := auxToType(v.Aux)
  7059  		ptr := v_0
  7060  		mem := v_1
  7061  		if !(t.Alignment()%4 == 0) {
  7062  			break
  7063  		}
  7064  		v.reset(OpMIPSMOVWstore)
  7065  		v.AuxInt = int32ToAuxInt(12)
  7066  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7067  		v0.AuxInt = int32ToAuxInt(0)
  7068  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7069  		v1.AuxInt = int32ToAuxInt(8)
  7070  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7071  		v2.AuxInt = int32ToAuxInt(4)
  7072  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7073  		v3.AuxInt = int32ToAuxInt(0)
  7074  		v3.AddArg3(ptr, v0, mem)
  7075  		v2.AddArg3(ptr, v0, v3)
  7076  		v1.AddArg3(ptr, v0, v2)
  7077  		v.AddArg3(ptr, v0, v1)
  7078  		return true
  7079  	}
  7080  	// match: (Zero [s] {t} ptr mem)
  7081  	// cond: (s > 16 || t.Alignment()%4 != 0)
  7082  	// result: (LoweredZero [int32(t.Alignment())] ptr (ADDconst <ptr.Type> ptr [int32(s-moveSize(t.Alignment(), config))]) mem)
  7083  	for {
  7084  		s := auxIntToInt64(v.AuxInt)
  7085  		t := auxToType(v.Aux)
  7086  		ptr := v_0
  7087  		mem := v_1
  7088  		if !(s > 16 || t.Alignment()%4 != 0) {
  7089  			break
  7090  		}
  7091  		v.reset(OpMIPSLoweredZero)
  7092  		v.AuxInt = int32ToAuxInt(int32(t.Alignment()))
  7093  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, ptr.Type)
  7094  		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
  7095  		v0.AddArg(ptr)
  7096  		v.AddArg3(ptr, v0, mem)
  7097  		return true
  7098  	}
  7099  	return false
  7100  }
  7101  func rewriteValueMIPS_OpZeromask(v *Value) bool {
  7102  	v_0 := v.Args[0]
  7103  	b := v.Block
  7104  	typ := &b.Func.Config.Types
  7105  	// match: (Zeromask x)
  7106  	// result: (NEG (SGTU x (MOVWconst [0])))
  7107  	for {
  7108  		x := v_0
  7109  		v.reset(OpMIPSNEG)
  7110  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  7111  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7112  		v1.AuxInt = int32ToAuxInt(0)
  7113  		v0.AddArg2(x, v1)
  7114  		v.AddArg(v0)
  7115  		return true
  7116  	}
  7117  }
  7118  func rewriteBlockMIPS(b *Block) bool {
  7119  	switch b.Kind {
  7120  	case BlockMIPSEQ:
  7121  		// match: (EQ (FPFlagTrue cmp) yes no)
  7122  		// result: (FPF cmp yes no)
  7123  		for b.Controls[0].Op == OpMIPSFPFlagTrue {
  7124  			v_0 := b.Controls[0]
  7125  			cmp := v_0.Args[0]
  7126  			b.resetWithControl(BlockMIPSFPF, cmp)
  7127  			return true
  7128  		}
  7129  		// match: (EQ (FPFlagFalse cmp) yes no)
  7130  		// result: (FPT cmp yes no)
  7131  		for b.Controls[0].Op == OpMIPSFPFlagFalse {
  7132  			v_0 := b.Controls[0]
  7133  			cmp := v_0.Args[0]
  7134  			b.resetWithControl(BlockMIPSFPT, cmp)
  7135  			return true
  7136  		}
  7137  		// match: (EQ (XORconst [1] cmp:(SGT _ _)) yes no)
  7138  		// result: (NE cmp yes no)
  7139  		for b.Controls[0].Op == OpMIPSXORconst {
  7140  			v_0 := b.Controls[0]
  7141  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7142  				break
  7143  			}
  7144  			cmp := v_0.Args[0]
  7145  			if cmp.Op != OpMIPSSGT {
  7146  				break
  7147  			}
  7148  			b.resetWithControl(BlockMIPSNE, cmp)
  7149  			return true
  7150  		}
  7151  		// match: (EQ (XORconst [1] cmp:(SGTU _ _)) yes no)
  7152  		// result: (NE cmp yes no)
  7153  		for b.Controls[0].Op == OpMIPSXORconst {
  7154  			v_0 := b.Controls[0]
  7155  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7156  				break
  7157  			}
  7158  			cmp := v_0.Args[0]
  7159  			if cmp.Op != OpMIPSSGTU {
  7160  				break
  7161  			}
  7162  			b.resetWithControl(BlockMIPSNE, cmp)
  7163  			return true
  7164  		}
  7165  		// match: (EQ (XORconst [1] cmp:(SGTconst _)) yes no)
  7166  		// result: (NE cmp yes no)
  7167  		for b.Controls[0].Op == OpMIPSXORconst {
  7168  			v_0 := b.Controls[0]
  7169  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7170  				break
  7171  			}
  7172  			cmp := v_0.Args[0]
  7173  			if cmp.Op != OpMIPSSGTconst {
  7174  				break
  7175  			}
  7176  			b.resetWithControl(BlockMIPSNE, cmp)
  7177  			return true
  7178  		}
  7179  		// match: (EQ (XORconst [1] cmp:(SGTUconst _)) yes no)
  7180  		// result: (NE cmp yes no)
  7181  		for b.Controls[0].Op == OpMIPSXORconst {
  7182  			v_0 := b.Controls[0]
  7183  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7184  				break
  7185  			}
  7186  			cmp := v_0.Args[0]
  7187  			if cmp.Op != OpMIPSSGTUconst {
  7188  				break
  7189  			}
  7190  			b.resetWithControl(BlockMIPSNE, cmp)
  7191  			return true
  7192  		}
  7193  		// match: (EQ (XORconst [1] cmp:(SGTzero _)) yes no)
  7194  		// result: (NE cmp yes no)
  7195  		for b.Controls[0].Op == OpMIPSXORconst {
  7196  			v_0 := b.Controls[0]
  7197  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7198  				break
  7199  			}
  7200  			cmp := v_0.Args[0]
  7201  			if cmp.Op != OpMIPSSGTzero {
  7202  				break
  7203  			}
  7204  			b.resetWithControl(BlockMIPSNE, cmp)
  7205  			return true
  7206  		}
  7207  		// match: (EQ (XORconst [1] cmp:(SGTUzero _)) yes no)
  7208  		// result: (NE cmp yes no)
  7209  		for b.Controls[0].Op == OpMIPSXORconst {
  7210  			v_0 := b.Controls[0]
  7211  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7212  				break
  7213  			}
  7214  			cmp := v_0.Args[0]
  7215  			if cmp.Op != OpMIPSSGTUzero {
  7216  				break
  7217  			}
  7218  			b.resetWithControl(BlockMIPSNE, cmp)
  7219  			return true
  7220  		}
  7221  		// match: (EQ (SGTUconst [1] x) yes no)
  7222  		// result: (NE x yes no)
  7223  		for b.Controls[0].Op == OpMIPSSGTUconst {
  7224  			v_0 := b.Controls[0]
  7225  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7226  				break
  7227  			}
  7228  			x := v_0.Args[0]
  7229  			b.resetWithControl(BlockMIPSNE, x)
  7230  			return true
  7231  		}
  7232  		// match: (EQ (SGTUzero x) yes no)
  7233  		// result: (EQ x yes no)
  7234  		for b.Controls[0].Op == OpMIPSSGTUzero {
  7235  			v_0 := b.Controls[0]
  7236  			x := v_0.Args[0]
  7237  			b.resetWithControl(BlockMIPSEQ, x)
  7238  			return true
  7239  		}
  7240  		// match: (EQ (SGTconst [0] x) yes no)
  7241  		// result: (GEZ x yes no)
  7242  		for b.Controls[0].Op == OpMIPSSGTconst {
  7243  			v_0 := b.Controls[0]
  7244  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7245  				break
  7246  			}
  7247  			x := v_0.Args[0]
  7248  			b.resetWithControl(BlockMIPSGEZ, x)
  7249  			return true
  7250  		}
  7251  		// match: (EQ (SGTzero x) yes no)
  7252  		// result: (LEZ x yes no)
  7253  		for b.Controls[0].Op == OpMIPSSGTzero {
  7254  			v_0 := b.Controls[0]
  7255  			x := v_0.Args[0]
  7256  			b.resetWithControl(BlockMIPSLEZ, x)
  7257  			return true
  7258  		}
  7259  		// match: (EQ (MOVWconst [0]) yes no)
  7260  		// result: (First yes no)
  7261  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7262  			v_0 := b.Controls[0]
  7263  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7264  				break
  7265  			}
  7266  			b.Reset(BlockFirst)
  7267  			return true
  7268  		}
  7269  		// match: (EQ (MOVWconst [c]) yes no)
  7270  		// cond: c != 0
  7271  		// result: (First no yes)
  7272  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7273  			v_0 := b.Controls[0]
  7274  			c := auxIntToInt32(v_0.AuxInt)
  7275  			if !(c != 0) {
  7276  				break
  7277  			}
  7278  			b.Reset(BlockFirst)
  7279  			b.swapSuccessors()
  7280  			return true
  7281  		}
  7282  	case BlockMIPSGEZ:
  7283  		// match: (GEZ (MOVWconst [c]) yes no)
  7284  		// cond: c >= 0
  7285  		// result: (First yes no)
  7286  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7287  			v_0 := b.Controls[0]
  7288  			c := auxIntToInt32(v_0.AuxInt)
  7289  			if !(c >= 0) {
  7290  				break
  7291  			}
  7292  			b.Reset(BlockFirst)
  7293  			return true
  7294  		}
  7295  		// match: (GEZ (MOVWconst [c]) yes no)
  7296  		// cond: c < 0
  7297  		// result: (First no yes)
  7298  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7299  			v_0 := b.Controls[0]
  7300  			c := auxIntToInt32(v_0.AuxInt)
  7301  			if !(c < 0) {
  7302  				break
  7303  			}
  7304  			b.Reset(BlockFirst)
  7305  			b.swapSuccessors()
  7306  			return true
  7307  		}
  7308  	case BlockMIPSGTZ:
  7309  		// match: (GTZ (MOVWconst [c]) yes no)
  7310  		// cond: c > 0
  7311  		// result: (First yes no)
  7312  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7313  			v_0 := b.Controls[0]
  7314  			c := auxIntToInt32(v_0.AuxInt)
  7315  			if !(c > 0) {
  7316  				break
  7317  			}
  7318  			b.Reset(BlockFirst)
  7319  			return true
  7320  		}
  7321  		// match: (GTZ (MOVWconst [c]) yes no)
  7322  		// cond: c <= 0
  7323  		// result: (First no yes)
  7324  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7325  			v_0 := b.Controls[0]
  7326  			c := auxIntToInt32(v_0.AuxInt)
  7327  			if !(c <= 0) {
  7328  				break
  7329  			}
  7330  			b.Reset(BlockFirst)
  7331  			b.swapSuccessors()
  7332  			return true
  7333  		}
  7334  	case BlockIf:
  7335  		// match: (If cond yes no)
  7336  		// result: (NE cond yes no)
  7337  		for {
  7338  			cond := b.Controls[0]
  7339  			b.resetWithControl(BlockMIPSNE, cond)
  7340  			return true
  7341  		}
  7342  	case BlockMIPSLEZ:
  7343  		// match: (LEZ (MOVWconst [c]) yes no)
  7344  		// cond: c <= 0
  7345  		// result: (First yes no)
  7346  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7347  			v_0 := b.Controls[0]
  7348  			c := auxIntToInt32(v_0.AuxInt)
  7349  			if !(c <= 0) {
  7350  				break
  7351  			}
  7352  			b.Reset(BlockFirst)
  7353  			return true
  7354  		}
  7355  		// match: (LEZ (MOVWconst [c]) yes no)
  7356  		// cond: c > 0
  7357  		// result: (First no yes)
  7358  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7359  			v_0 := b.Controls[0]
  7360  			c := auxIntToInt32(v_0.AuxInt)
  7361  			if !(c > 0) {
  7362  				break
  7363  			}
  7364  			b.Reset(BlockFirst)
  7365  			b.swapSuccessors()
  7366  			return true
  7367  		}
  7368  	case BlockMIPSLTZ:
  7369  		// match: (LTZ (MOVWconst [c]) yes no)
  7370  		// cond: c < 0
  7371  		// result: (First yes no)
  7372  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7373  			v_0 := b.Controls[0]
  7374  			c := auxIntToInt32(v_0.AuxInt)
  7375  			if !(c < 0) {
  7376  				break
  7377  			}
  7378  			b.Reset(BlockFirst)
  7379  			return true
  7380  		}
  7381  		// match: (LTZ (MOVWconst [c]) yes no)
  7382  		// cond: c >= 0
  7383  		// result: (First no yes)
  7384  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7385  			v_0 := b.Controls[0]
  7386  			c := auxIntToInt32(v_0.AuxInt)
  7387  			if !(c >= 0) {
  7388  				break
  7389  			}
  7390  			b.Reset(BlockFirst)
  7391  			b.swapSuccessors()
  7392  			return true
  7393  		}
  7394  	case BlockMIPSNE:
  7395  		// match: (NE (FPFlagTrue cmp) yes no)
  7396  		// result: (FPT cmp yes no)
  7397  		for b.Controls[0].Op == OpMIPSFPFlagTrue {
  7398  			v_0 := b.Controls[0]
  7399  			cmp := v_0.Args[0]
  7400  			b.resetWithControl(BlockMIPSFPT, cmp)
  7401  			return true
  7402  		}
  7403  		// match: (NE (FPFlagFalse cmp) yes no)
  7404  		// result: (FPF cmp yes no)
  7405  		for b.Controls[0].Op == OpMIPSFPFlagFalse {
  7406  			v_0 := b.Controls[0]
  7407  			cmp := v_0.Args[0]
  7408  			b.resetWithControl(BlockMIPSFPF, cmp)
  7409  			return true
  7410  		}
  7411  		// match: (NE (XORconst [1] cmp:(SGT _ _)) yes no)
  7412  		// result: (EQ cmp yes no)
  7413  		for b.Controls[0].Op == OpMIPSXORconst {
  7414  			v_0 := b.Controls[0]
  7415  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7416  				break
  7417  			}
  7418  			cmp := v_0.Args[0]
  7419  			if cmp.Op != OpMIPSSGT {
  7420  				break
  7421  			}
  7422  			b.resetWithControl(BlockMIPSEQ, cmp)
  7423  			return true
  7424  		}
  7425  		// match: (NE (XORconst [1] cmp:(SGTU _ _)) yes no)
  7426  		// result: (EQ cmp yes no)
  7427  		for b.Controls[0].Op == OpMIPSXORconst {
  7428  			v_0 := b.Controls[0]
  7429  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7430  				break
  7431  			}
  7432  			cmp := v_0.Args[0]
  7433  			if cmp.Op != OpMIPSSGTU {
  7434  				break
  7435  			}
  7436  			b.resetWithControl(BlockMIPSEQ, cmp)
  7437  			return true
  7438  		}
  7439  		// match: (NE (XORconst [1] cmp:(SGTconst _)) yes no)
  7440  		// result: (EQ cmp yes no)
  7441  		for b.Controls[0].Op == OpMIPSXORconst {
  7442  			v_0 := b.Controls[0]
  7443  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7444  				break
  7445  			}
  7446  			cmp := v_0.Args[0]
  7447  			if cmp.Op != OpMIPSSGTconst {
  7448  				break
  7449  			}
  7450  			b.resetWithControl(BlockMIPSEQ, cmp)
  7451  			return true
  7452  		}
  7453  		// match: (NE (XORconst [1] cmp:(SGTUconst _)) yes no)
  7454  		// result: (EQ cmp yes no)
  7455  		for b.Controls[0].Op == OpMIPSXORconst {
  7456  			v_0 := b.Controls[0]
  7457  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7458  				break
  7459  			}
  7460  			cmp := v_0.Args[0]
  7461  			if cmp.Op != OpMIPSSGTUconst {
  7462  				break
  7463  			}
  7464  			b.resetWithControl(BlockMIPSEQ, cmp)
  7465  			return true
  7466  		}
  7467  		// match: (NE (XORconst [1] cmp:(SGTzero _)) yes no)
  7468  		// result: (EQ cmp yes no)
  7469  		for b.Controls[0].Op == OpMIPSXORconst {
  7470  			v_0 := b.Controls[0]
  7471  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7472  				break
  7473  			}
  7474  			cmp := v_0.Args[0]
  7475  			if cmp.Op != OpMIPSSGTzero {
  7476  				break
  7477  			}
  7478  			b.resetWithControl(BlockMIPSEQ, cmp)
  7479  			return true
  7480  		}
  7481  		// match: (NE (XORconst [1] cmp:(SGTUzero _)) yes no)
  7482  		// result: (EQ cmp yes no)
  7483  		for b.Controls[0].Op == OpMIPSXORconst {
  7484  			v_0 := b.Controls[0]
  7485  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7486  				break
  7487  			}
  7488  			cmp := v_0.Args[0]
  7489  			if cmp.Op != OpMIPSSGTUzero {
  7490  				break
  7491  			}
  7492  			b.resetWithControl(BlockMIPSEQ, cmp)
  7493  			return true
  7494  		}
  7495  		// match: (NE (SGTUconst [1] x) yes no)
  7496  		// result: (EQ x yes no)
  7497  		for b.Controls[0].Op == OpMIPSSGTUconst {
  7498  			v_0 := b.Controls[0]
  7499  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7500  				break
  7501  			}
  7502  			x := v_0.Args[0]
  7503  			b.resetWithControl(BlockMIPSEQ, x)
  7504  			return true
  7505  		}
  7506  		// match: (NE (SGTUzero x) yes no)
  7507  		// result: (NE x yes no)
  7508  		for b.Controls[0].Op == OpMIPSSGTUzero {
  7509  			v_0 := b.Controls[0]
  7510  			x := v_0.Args[0]
  7511  			b.resetWithControl(BlockMIPSNE, x)
  7512  			return true
  7513  		}
  7514  		// match: (NE (SGTconst [0] x) yes no)
  7515  		// result: (LTZ x yes no)
  7516  		for b.Controls[0].Op == OpMIPSSGTconst {
  7517  			v_0 := b.Controls[0]
  7518  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7519  				break
  7520  			}
  7521  			x := v_0.Args[0]
  7522  			b.resetWithControl(BlockMIPSLTZ, x)
  7523  			return true
  7524  		}
  7525  		// match: (NE (SGTzero x) yes no)
  7526  		// result: (GTZ x yes no)
  7527  		for b.Controls[0].Op == OpMIPSSGTzero {
  7528  			v_0 := b.Controls[0]
  7529  			x := v_0.Args[0]
  7530  			b.resetWithControl(BlockMIPSGTZ, x)
  7531  			return true
  7532  		}
  7533  		// match: (NE (MOVWconst [0]) yes no)
  7534  		// result: (First no yes)
  7535  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7536  			v_0 := b.Controls[0]
  7537  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7538  				break
  7539  			}
  7540  			b.Reset(BlockFirst)
  7541  			b.swapSuccessors()
  7542  			return true
  7543  		}
  7544  		// match: (NE (MOVWconst [c]) yes no)
  7545  		// cond: c != 0
  7546  		// result: (First yes no)
  7547  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7548  			v_0 := b.Controls[0]
  7549  			c := auxIntToInt32(v_0.AuxInt)
  7550  			if !(c != 0) {
  7551  				break
  7552  			}
  7553  			b.Reset(BlockFirst)
  7554  			return true
  7555  		}
  7556  	}
  7557  	return false
  7558  }
  7559